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Searched refs:ADC_CMDH_WAIT_TRIG_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imxrt6xx/
Dfsl_lpadc.c397 tmp32 |= ADC_CMDH_WAIT_TRIG_MASK; /* Wait trigger enable. */ in LPADC_SetConvCommandConfig()
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_lpadc.c397 tmp32 |= ADC_CMDH_WAIT_TRIG_MASK; /* Wait trigger enable. */ in LPADC_SetConvCommandConfig()
/hal_nxp-2.7.6/mcux/drivers/lpc/
Dfsl_lpadc.c397 tmp32 |= ADC_CMDH_WAIT_TRIG_MASK; /* Wait trigger enable. */ in LPADC_SetConvCommandConfig()
/hal_nxp-2.7.6/mcux/devices/LPC55S28/
DLPC55S28.h1141 #define ADC_CMDH_WAIT_TRIG_MASK (0x4U) macro
1147 … (((uint32_t)(((uint32_t)(x)) << ADC_CMDH_WAIT_TRIG_SHIFT)) & ADC_CMDH_WAIT_TRIG_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
DLPC55S69_cm33_core0.h1141 #define ADC_CMDH_WAIT_TRIG_MASK (0x4U) macro
1147 … (((uint32_t)(((uint32_t)(x)) << ADC_CMDH_WAIT_TRIG_SHIFT)) & ADC_CMDH_WAIT_TRIG_MASK)
DLPC55S69_cm33_core1.h1141 #define ADC_CMDH_WAIT_TRIG_MASK (0x4U) macro
1147 … (((uint32_t)(((uint32_t)(x)) << ADC_CMDH_WAIT_TRIG_SHIFT)) & ADC_CMDH_WAIT_TRIG_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
DLPC55S16.h1051 #define ADC_CMDH_WAIT_TRIG_MASK (0x4U) macro
1057 … (((uint32_t)(((uint32_t)(x)) << ADC_CMDH_WAIT_TRIG_SHIFT)) & ADC_CMDH_WAIT_TRIG_MASK)