| /hal_nxp-2.7.6/mcux/drivers/kinetis/ |
| D | fsl_adc12.c | 99 uint32_t CLPS = ((base->CLPS & ADC_CLPS_CLPS_MASK) >> ADC_CLPS_CLPS_SHIFT); in ADC12_GetCalibrationStatus()
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| /hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
| D | MKL25Z4.h | 505 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
507 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
| D | MK22F51212.h | 738 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
740 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
| D | MKW24D5.h | 543 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
545 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
| D | MKE14F16.h | 814 #define ADC_CLPS_CLPS_MASK (0x7FU) macro
816 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
| D | MKW22D5.h | 543 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
545 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
| D | MKE16F16.h | 814 #define ADC_CLPS_CLPS_MASK (0x7FU) macro
816 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
| D | MKE18F16.h | 814 #define ADC_CLPS_CLPS_MASK (0x7FU) macro
816 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
| D | MKW31Z4.h | 463 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
465 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK64F12/ |
| D | MK64F12.h | 799 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
801 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
| D | MKW40Z4.h | 439 #define ADC_CLPS_CLPS_MASK 0x3Fu macro
442 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPS_CLPS_SHIFT))&ADC_CLPS_CLPS_MASK)
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| D | MKW40Z4_extension.h | 1307 #define ADC_RD_CLPS_CLPS(base) ((ADC_CLPS_REG(base) & ADC_CLPS_CLPS_MASK) >> ADC_CLPS_CLPS_SHIFT)
1311 #define ADC_WR_CLPS_CLPS(base, value) (ADC_RMW_CLPS(base, ADC_CLPS_CLPS_MASK, ADC_CLPS_CLPS(value)))
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| /hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
| D | MKW21Z4.h | 462 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
464 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
| D | MKW41Z4.h | 463 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
465 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
| D | MKW20Z4.h | 439 #define ADC_CLPS_CLPS_MASK 0x3Fu macro
442 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPS_CLPS_SHIFT))&ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
| D | MKW30Z4.h | 439 #define ADC_CLPS_CLPS_MASK 0x3Fu macro
442 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPS_CLPS_SHIFT))&ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
| D | MKV56F24.h | 996 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
998 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
| D | MK80F25615.h | 806 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
808 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
| D | MKV58F24.h | 996 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
998 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
| D | MK82F25615.h | 800 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
802 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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| /hal_nxp-2.7.6/mcux/devices/MK66F18/ |
| D | MK66F18.h | 760 #define ADC_CLPS_CLPS_MASK (0x3FU) macro
762 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPS_CLPS_SHIFT)) & ADC_CLPS_CLPS_MASK)
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