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Searched refs:ADC_CLPD_CLPD_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h500 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
502 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h731 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
733 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h538 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
540 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h538 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
540 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h458 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
460 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h791 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
793 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h434 #define ADC_CLPD_CLPD_MASK 0x3Fu macro
437 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPD_CLPD_SHIFT))&ADC_CLPD_CLPD_MASK)
DMKW40Z4_extension.h1265 #define ADC_RD_CLPD_CLPD(base) ((ADC_CLPD_REG(base) & ADC_CLPD_CLPD_MASK) >> ADC_CLPD_CLPD_SHIFT)
1269 #define ADC_WR_CLPD_CLPD(base, value) (ADC_RMW_CLPD(base, ADC_CLPD_CLPD_MASK, ADC_CLPD_CLPD(value)))
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h457 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
459 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h458 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
460 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h434 #define ADC_CLPD_CLPD_MASK 0x3Fu macro
437 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPD_CLPD_SHIFT))&ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h434 #define ADC_CLPD_CLPD_MASK 0x3Fu macro
437 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPD_CLPD_SHIFT))&ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h989 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
991 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h799 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
801 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h989 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
991 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h793 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
795 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h753 #define ADC_CLPD_CLPD_MASK (0x3FU) macro
755 … (((uint32_t)(((uint32_t)(x)) << ADC_CLPD_CLPD_SHIFT)) & ADC_CLPD_CLPD_MASK)