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Searched refs:ADC_CLP3_CLP3_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_adc12.c103 uint32_t CLP3 = ((base->CLP3 & ADC_CLP3_CLP3_MASK) >> ADC_CLP3_CLP3_SHIFT); in ADC12_GetCalibrationStatus()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h515 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
517 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h752 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
754 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h553 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
555 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h821 #define ADC_CLP3_CLP3_MASK (0x3FFU) macro
823 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h553 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
555 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h821 #define ADC_CLP3_CLP3_MASK (0x3FFU) macro
823 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h821 #define ADC_CLP3_CLP3_MASK (0x3FFU) macro
823 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h473 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
475 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h815 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
817 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h449 #define ADC_CLP3_CLP3_MASK 0x1FFu macro
452 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP3_CLP3_SHIFT))&ADC_CLP3_CLP3_MASK)
DMKW40Z4_extension.h1391 #define ADC_RD_CLP3_CLP3(base) ((ADC_CLP3_REG(base) & ADC_CLP3_CLP3_MASK) >> ADC_CLP3_CLP3_SHIFT)
1395 #define ADC_WR_CLP3_CLP3(base, value) (ADC_RMW_CLP3(base, ADC_CLP3_CLP3_MASK, ADC_CLP3_CLP3(value)))
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h472 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
474 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h473 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
475 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h449 #define ADC_CLP3_CLP3_MASK 0x1FFu macro
452 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP3_CLP3_SHIFT))&ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h449 #define ADC_CLP3_CLP3_MASK 0x1FFu macro
452 …(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP3_CLP3_SHIFT))&ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h1010 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
1012 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h820 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
822 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h1010 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
1012 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h814 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
816 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h774 #define ADC_CLP3_CLP3_MASK (0x1FFU) macro
776 … (((uint32_t)(((uint32_t)(x)) << ADC_CLP3_CLP3_SHIFT)) & ADC_CLP3_CLP3_MASK)