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Searched refs:ADC_CLP0_CLP0_SHIFT (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_adc12.c100 uint32_t CLP0 = ((base->CLP0 & ADC_CLP0_CLP0_MASK) >> ADC_CLP0_CLP0_SHIFT); in ADC12_GetCalibrationStatus()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h531 #define ADC_CLP0_CLP0_SHIFT (0U) macro
532 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h774 #define ADC_CLP0_CLP0_SHIFT (0U) macro
775 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h569 #define ADC_CLP0_CLP0_SHIFT (0U) macro
570 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h843 #define ADC_CLP0_CLP0_SHIFT (0U) macro
844 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h569 #define ADC_CLP0_CLP0_SHIFT (0U) macro
570 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h843 #define ADC_CLP0_CLP0_SHIFT (0U) macro
844 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h843 #define ADC_CLP0_CLP0_SHIFT (0U) macro
844 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h489 #define ADC_CLP0_CLP0_SHIFT (0U) macro
490 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h840 #define ADC_CLP0_CLP0_SHIFT (0U) macro
841 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h465 #define ADC_CLP0_CLP0_SHIFT 0 macro
467 #define ADC_CLP0_CLP0(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP0_CLP0_SHIFT)…
DMKW40Z4_extension.h1517 #define ADC_RD_CLP0_CLP0(base) ((ADC_CLP0_REG(base) & ADC_CLP0_CLP0_MASK) >> ADC_CLP0_CLP0_SHIFT)
1518 #define ADC_BRD_CLP0_CLP0(base) (BME_UBFX32(&ADC_CLP0_REG(base), ADC_CLP0_CLP0_SHIFT, ADC_CLP0_CLP0…
1522 …) (BME_BFI32(&ADC_CLP0_REG(base), ((uint32_t)(value) << ADC_CLP0_CLP0_SHIFT), ADC_CLP0_CLP0_SHIFT,…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h488 #define ADC_CLP0_CLP0_SHIFT (0U) macro
489 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h489 #define ADC_CLP0_CLP0_SHIFT (0U) macro
490 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h465 #define ADC_CLP0_CLP0_SHIFT 0 macro
467 #define ADC_CLP0_CLP0(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP0_CLP0_SHIFT)…
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h465 #define ADC_CLP0_CLP0_SHIFT 0 macro
467 #define ADC_CLP0_CLP0(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP0_CLP0_SHIFT)…
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h1032 #define ADC_CLP0_CLP0_SHIFT (0U) macro
1033 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h842 #define ADC_CLP0_CLP0_SHIFT (0U) macro
843 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h1032 #define ADC_CLP0_CLP0_SHIFT (0U) macro
1033 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h836 #define ADC_CLP0_CLP0_SHIFT (0U) macro
837 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h796 #define ADC_CLP0_CLP0_SHIFT (0U) macro
797 …P0_CLP0(x) (((uint32_t)(((uint32_t)(x)) << ADC_CLP0_CLP0_SHIFT)) & ADC_CLP…