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Searched refs:ADC_CFG2_MUXSEL_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_adc16.c271 base->CFG2 &= ~ADC_CFG2_MUXSEL_MASK; in ADC16_SetChannelMuxMode()
275 base->CFG2 |= ADC_CFG2_MUXSEL_MASK; in ADC16_SetChannelMuxMode()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h422 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
424 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h583 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
589 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h460 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
462 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h460 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
462 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h380 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
382 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h606 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
612 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h349 #define ADC_CFG2_MUXSEL_MASK 0x10u macro
352 …) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_MUXSEL_SHIFT))&ADC_CFG2_MUXSEL_MASK)
DMKW40Z4_extension.h572 #define ADC_RD_CFG2_MUXSEL(base) ((ADC_CFG2_REG(base) & ADC_CFG2_MUXSEL_MASK) >> ADC_CFG2_MUXSEL_SH…
576 #define ADC_WR_CFG2_MUXSEL(base, value) (ADC_RMW_CFG2(base, ADC_CFG2_MUXSEL_MASK, ADC_CFG2_MUXSEL(v…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h379 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
381 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h380 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
382 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h349 #define ADC_CFG2_MUXSEL_MASK 0x10u macro
352 …) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_MUXSEL_SHIFT))&ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h349 #define ADC_CFG2_MUXSEL_MASK 0x10u macro
352 …) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_MUXSEL_SHIFT))&ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h841 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
847 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h651 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
657 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h841 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
847 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h645 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
651 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h605 #define ADC_CFG2_MUXSEL_MASK (0x10U) macro
611 … (((uint32_t)(((uint32_t)(x)) << ADC_CFG2_MUXSEL_SHIFT)) & ADC_CFG2_MUXSEL_MASK)