/hal_nxp-2.7.6/mcux/devices/MKL25Z4/ |
D | MKL25Z4.h | 406 #define ADC_CFG1_ADIV_SHIFT (5U) macro 407 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MK22F51212/ |
D | MK22F51212.h | 541 #define ADC_CFG1_ADIV_SHIFT (5U) macro 548 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW24D5/ |
D | MKW24D5.h | 444 #define ADC_CFG1_ADIV_SHIFT (5U) macro 445 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKE14F16/ |
D | MKE14F16.h | 645 #define ADC_CFG1_ADIV_SHIFT (5U) macro 652 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW22D5/ |
D | MKW22D5.h | 444 #define ADC_CFG1_ADIV_SHIFT (5U) macro 445 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKE16F16/ |
D | MKE16F16.h | 645 #define ADC_CFG1_ADIV_SHIFT (5U) macro 652 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKE18F16/ |
D | MKE18F16.h | 645 #define ADC_CFG1_ADIV_SHIFT (5U) macro 652 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/ |
D | MKW31Z4.h | 364 #define ADC_CFG1_ADIV_SHIFT (5U) macro 365 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MK64F12/ |
D | MK64F12.h | 559 #define ADC_CFG1_ADIV_SHIFT (5U) macro 566 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/ |
D | MKW40Z4.h | 329 #define ADC_CFG1_ADIV_SHIFT 5 macro 331 #define ADC_CFG1_ADIV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADIV_SHIFT)…
|
D | MKW40Z4_extension.h | 428 #define ADC_RD_CFG1_ADIV(base) ((ADC_CFG1_REG(base) & ADC_CFG1_ADIV_MASK) >> ADC_CFG1_ADIV_SHIFT) 429 #define ADC_BRD_CFG1_ADIV(base) (BME_UBFX32(&ADC_CFG1_REG(base), ADC_CFG1_ADIV_SHIFT, ADC_CFG1_ADIV… 433 …) (BME_BFI32(&ADC_CFG1_REG(base), ((uint32_t)(value) << ADC_CFG1_ADIV_SHIFT), ADC_CFG1_ADIV_SHIFT,…
|
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/ |
D | MKW21Z4.h | 363 #define ADC_CFG1_ADIV_SHIFT (5U) macro 364 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/ |
D | MKW41Z4.h | 364 #define ADC_CFG1_ADIV_SHIFT (5U) macro 365 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/ |
D | MKW20Z4.h | 329 #define ADC_CFG1_ADIV_SHIFT 5 macro 331 #define ADC_CFG1_ADIV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADIV_SHIFT)…
|
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/ |
D | MKW30Z4.h | 329 #define ADC_CFG1_ADIV_SHIFT 5 macro 331 #define ADC_CFG1_ADIV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADIV_SHIFT)…
|
/hal_nxp-2.7.6/mcux/devices/MKV56F24/ |
D | MKV56F24.h | 799 #define ADC_CFG1_ADIV_SHIFT (5U) macro 806 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MK80F25615/ |
D | MK80F25615.h | 609 #define ADC_CFG1_ADIV_SHIFT (5U) macro 616 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MKV58F24/ |
D | MKV58F24.h | 799 #define ADC_CFG1_ADIV_SHIFT (5U) macro 806 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MK82F25615/ |
D | MK82F25615.h | 603 #define ADC_CFG1_ADIV_SHIFT (5U) macro 610 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|
/hal_nxp-2.7.6/mcux/devices/MK66F18/ |
D | MK66F18.h | 563 #define ADC_CFG1_ADIV_SHIFT (5U) macro 570 …G1_ADIV(x) (((uint32_t)(((uint32_t)(x)) << ADC_CFG1_ADIV_SHIFT)) & ADC_CFG…
|