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Searched refs:u32ClkTbl (Results 1 – 5 of 5) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/src/
Duart.c195 uint32_t u32ClkTbl[4] = {__HXT, 0ul, __LXT, __HIRC}; in UART_Open() local
254 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_Open()
260 …u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), u3… in UART_Open()
264 …uart->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartCl… in UART_Open()
351 uint32_t u32ClkTbl[4ul] = {__HXT, 0ul, __LXT, __HIRC}; in UART_SetLineConfig() local
401 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_SetLineConfig()
410 …u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), u3… in UART_SetLineConfig()
414 …uart->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartCl… in UART_SetLineConfig()
463 uint32_t u32ClkTbl[4ul] = {__HXT, 0ul, __LXT, __HIRC}; in UART_SelectIrDAMode() local
517 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_SelectIrDAMode()
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/hal_nuvoton-latest/m2l31x/StdDriver/src/
Duart.c204 uint32_t u32ClkTbl[6] = {__HXT, 0ul, __LXT, __HIRC, __MIRC, __HIRC48}; in UART_Open() local
277 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_Open()
283 …u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), u3… in UART_Open()
287 …uart->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartCl… in UART_Open()
374 uint32_t u32ClkTbl[6ul] = {__HXT, 0ul, __LXT, __HIRC, __MIRC, __HIRC48}; in UART_SetLine_Config() local
438 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_SetLine_Config()
447 …u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), u3… in UART_SetLine_Config()
451 …uart->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartCl… in UART_SetLine_Config()
500 uint32_t u32ClkTbl[6ul] = {__HXT, 0ul, __LXT, __HIRC, __MIRC, __HIRC48}; in UART_SelectIrDAMode() local
567 u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq(); in UART_SelectIrDAMode()
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Dlpuart.c185 uint32_t u32ClkTbl[4] = {__HIRC, __MIRC, __LXT}; in LPUART_Open() local
210 …u32Baud_Div = LPUART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), … in LPUART_Open()
214 …lpuart->BAUD = (LPUART_BAUD_MODE0 | LPUART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32… in LPUART_Open()
301 uint32_t u32ClkTbl[4] = {__HIRC, __MIRC, __LXT}; in LPUART_SetLine_Config() local
317 …u32Baud_Div = LPUART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), … in LPUART_SetLine_Config()
321 …lpuart->BAUD = (LPUART_BAUD_MODE0 | LPUART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32… in LPUART_SetLine_Config()
Dlptmr_pwm.c40 const uint32_t u32ClkTbl[4] = {__HIRC, __MIRC, __LXT, __LIRC}; in LPTPWM_ConfigOutputFreqAndDuty() local
52 u32PWMClockFreq = u32ClkTbl[u32Src]; in LPTPWM_ConfigOutputFreqAndDuty()
Dclk.c857 …uint32_t u32ClkTbl[6] = {0x0, 0x4, 0x8, 0x34, 0x54, 00}; /* AHBCLK/APBCLK offset on MODULE inde… in CLK_EnableModuleClock() local
865 …*(volatile uint32_t *)((uint32_t)&CLK->AHBCLK0 + (u32ClkTbl[MODULE_APBCLK(u32ModuleIdx)])) |= 1 <… in CLK_EnableModuleClock()
955 …uint32_t u32ClkTbl[6] = {0x0, 0x4, 0x8, 0x34, 0x54, 00}; /* AHBCLK/APBCLK offset on MODULE inde… in CLK_DisableModuleClock() local
963 …*(volatile uint32_t *)((uint32_t)&CLK->AHBCLK0 + (u32ClkTbl[MODULE_APBCLK(u32ModuleIdx)])) &= ~(1… in CLK_DisableModuleClock()