Searched refs:div1 (Results 1 – 2 of 2) sorted by relevance
287 uint32_t rate, div1; in SDH_Set_clock() local377 div1 = (rate - 1ul) & 0xFFul; in SDH_Set_clock()383 CLK->CLKDIV0 |= (div1 << CLK_CLKDIV0_SDH0DIV_Pos); in SDH_Set_clock()388 CLK->CLKDIV3 |= (div1 << CLK_CLKDIV3_SDH1DIV_Pos); in SDH_Set_clock()
338 uint32_t rate, div1; in SDH_Set_clock() local446 div1 = (rate - 1ul) & 0xFFul; in SDH_Set_clock()452 CLK->CLKDIV0 |= (div1 << CLK_CLKDIV0_SDH0DIV_Pos); in SDH_Set_clock()457 CLK->CLKDIV3 |= (div1 << CLK_CLKDIV3_SDH1DIV_Pos); in SDH_Set_clock()