1 /**************************************************************************//**
2 * @file uart.h
3 * @version V3.00
4 * @brief M460 series UART driver header file
5 *
6 * @copyright SPDX-License-Identifier: Apache-2.0
7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #ifndef __UART_H__
10 #define __UART_H__
11
12
13 #ifdef __cplusplus
14 extern "C"
15 {
16 #endif
17
18
19 /** @addtogroup Standard_Driver Standard Driver
20 @{
21 */
22
23 /** @addtogroup UART_Driver UART Driver
24 @{
25 */
26
27 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
28 @{
29 */
30
31 /*---------------------------------------------------------------------------------------------------------*/
32 /* UART FIFO size constants definitions */
33 /*---------------------------------------------------------------------------------------------------------*/
34
35 #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
36 #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
37 #define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
38 #define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
39 #define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
40 #define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
41 #define UART6_FIFO_SIZE 16ul /*!< UART6 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
42 #define UART7_FIFO_SIZE 16ul /*!< UART7 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
43 #define UART8_FIFO_SIZE 16ul /*!< UART8 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
44 #define UART9_FIFO_SIZE 16ul /*!< UART9 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
45
46 /*---------------------------------------------------------------------------------------------------------*/
47 /* UART_FIFO constants definitions */
48 /*---------------------------------------------------------------------------------------------------------*/
49
50 #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
51 #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
52 #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
53 #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
54
55 #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
56 #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
57 #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
58 #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
59
60 /*---------------------------------------------------------------------------------------------------------*/
61 /* UART_LINE constants definitions */
62 /*---------------------------------------------------------------------------------------------------------*/
63 #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
64 #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
65 #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
66 #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
67
68 #define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
69 #define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
70 #define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
71 #define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
72 #define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
73
74 #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
75 #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
76 #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
77
78
79 /*---------------------------------------------------------------------------------------------------------*/
80 /* UART RTS ACTIVE LEVEL constants definitions */
81 /*---------------------------------------------------------------------------------------------------------*/
82 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
83 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
84
85
86 /*---------------------------------------------------------------------------------------------------------*/
87 /* UART_IRDA constants definitions */
88 /*---------------------------------------------------------------------------------------------------------*/
89 #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
90 #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
91
92
93 /*---------------------------------------------------------------------------------------------------------*/
94 /* UART_FUNCSEL constants definitions */
95 /*---------------------------------------------------------------------------------------------------------*/
96 #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
97 #define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */
98 #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
99 #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
100 #define UART_FUNCSEL_SINGLE_WIRE (0x4ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set Single Wire Function */
101
102
103 /*---------------------------------------------------------------------------------------------------------*/
104 /* UART_LINCTL constants definitions */
105 /*---------------------------------------------------------------------------------------------------------*/
106 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 \hideinitializer */
107 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 \hideinitializer */
108 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field \hideinitializer */
109 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field \hideinitializer */
110 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field \hideinitializer */
111 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value \hideinitializer */
112
113
114 /*---------------------------------------------------------------------------------------------------------*/
115 /* UART BAUDRATE MODE constants definitions */
116 /*---------------------------------------------------------------------------------------------------------*/
117 #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
118 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
119
120
121 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
122
123
124 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
125 @{
126 */
127
128
129 /**
130 * @brief Calculate UART baudrate mode0 divider
131 *
132 * @param[in] u32SrcFreq UART clock frequency
133 * @param[in] u32BaudRate Baudrate of UART module
134 *
135 * @return UART baudrate mode0 divider
136 *
137 * @details This macro calculate UART baudrate mode0 divider.
138 * \hideinitializer
139 */
140 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
141
142
143 /**
144 * @brief Calculate UART baudrate mode2 divider
145 *
146 * @param[in] u32SrcFreq UART clock frequency
147 * @param[in] u32BaudRate Baudrate of UART module
148 *
149 * @return UART baudrate mode2 divider
150 *
151 * @details This macro calculate UART baudrate mode2 divider.
152 * \hideinitializer
153 */
154 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
155
156
157 /**
158 * @brief Write UART data
159 *
160 * @param[in] uart The pointer of the specified UART module
161 * @param[in] u8Data Data byte to transmit.
162 *
163 * @return None
164 *
165 * @details This macro write Data to Tx data register.
166 * \hideinitializer
167 */
168 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
169
170
171 /**
172 * @brief Read UART data
173 *
174 * @param[in] uart The pointer of the specified UART module
175 *
176 * @return The oldest data byte in RX FIFO.
177 *
178 * @details This macro read Rx data register.
179 * \hideinitializer
180 */
181 #define UART_READ(uart) ((uart)->DAT)
182
183
184 /**
185 * @brief Get Tx empty
186 *
187 * @param[in] uart The pointer of the specified UART module
188 *
189 * @retval 0 Tx FIFO is not empty
190 * @retval >=1 Tx FIFO is empty
191 *
192 * @details This macro get Transmitter FIFO empty register value.
193 * \hideinitializer
194 */
195 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
196
197
198 /**
199 * @brief Get Rx empty
200 *
201 * @param[in] uart The pointer of the specified UART module
202 *
203 * @retval 0 Rx FIFO is not empty
204 * @retval >=1 Rx FIFO is empty
205 *
206 * @details This macro get Receiver FIFO empty register value.
207 * \hideinitializer
208 */
209 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
210
211
212 /**
213 * @brief Check specified UART port transmission is over.
214 *
215 * @param[in] uart The pointer of the specified UART module
216 *
217 * @retval 0 Tx transmission is not over
218 * @retval 1 Tx transmission is over
219 *
220 * @details This macro return Transmitter Empty Flag register bit value.
221 * It indicates if specified UART port transmission is over nor not.
222 * \hideinitializer
223 */
224 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
225
226
227 /**
228 * @brief Wait specified UART port transmission is over
229 *
230 * @param[in] uart The pointer of the specified UART module
231 *
232 * @return None
233 *
234 * @details This macro wait specified UART port transmission is over.
235 * \hideinitializer
236 */
237 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
238
239
240 /**
241 * @brief Check RX is ready or not
242 *
243 * @param[in] uart The pointer of the specified UART module
244 *
245 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
246 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
247 *
248 * @details This macro check receive data available interrupt flag is set or not.
249 * \hideinitializer
250 */
251 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
252
253
254 /**
255 * @brief Check TX FIFO is full or not
256 *
257 * @param[in] uart The pointer of the specified UART module
258 *
259 * @retval 1 TX FIFO is full
260 * @retval 0 TX FIFO is not full
261 *
262 * @details This macro check TX FIFO is full or not.
263 * \hideinitializer
264 */
265 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
266
267
268 /**
269 * @brief Check RX FIFO is full or not
270 *
271 * @param[in] uart The pointer of the specified UART module
272 *
273 * @retval 1 RX FIFO is full
274 * @retval 0 RX FIFO is not full
275 *
276 * @details This macro check RX FIFO is full or not.
277 * \hideinitializer
278 */
279 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
280
281
282 /**
283 * @brief Get Tx full register value
284 *
285 * @param[in] uart The pointer of the specified UART module
286 *
287 * @retval 0 Tx FIFO is not full.
288 * @retval >=1 Tx FIFO is full.
289 *
290 * @details This macro get Tx full register value.
291 * \hideinitializer
292 */
293 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
294
295
296 /**
297 * @brief Get Rx full register value
298 *
299 * @param[in] uart The pointer of the specified UART module
300 *
301 * @retval 0 Rx FIFO is not full.
302 * @retval >=1 Rx FIFO is full.
303 *
304 * @details This macro get Rx full register value.
305 * \hideinitializer
306 */
307 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
308
309 /**
310 * @brief Rx Idle Status register value
311 *
312 * @param[in] uart The pointer of the specified UART module
313 *
314 * @retval 0 Rx is busy.
315 * @retval 1 Rx is Idle(Default)
316 *
317 * @details This macro get Rx Idle Status register value.
318 * \hideinitializer
319 */
320 #define UART_RX_IDLE(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXIDLE_Msk )>> UART_FIFOSTS_RXIDLE_Pos)
321
322 /**
323 * @brief Enable specified UART interrupt
324 *
325 * @param[in] uart The pointer of the specified UART module
326 * @param[in] u32eIntSel Interrupt type select
327 * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
328 * - \ref UART_INTEN_ABRIEN_Msk : Single-wire Bit Error Detection Interrupt
329 * - \ref UART_INTEN_SWBEIEN_Msk : Auto-baud Rate Interrupt
330 * - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
331 * - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
332 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
333 * - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
334 * - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
335 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
336 * - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
337 * - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
338 *
339 * @return None
340 *
341 * @details This macro enable specified UART interrupt.
342 * \hideinitializer
343 */
344 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
345
346
347 /**
348 * @brief Disable specified UART interrupt
349 *
350 * @param[in] uart The pointer of the specified UART module
351 * @param[in] u32eIntSel Interrupt type select
352 * - \ref UART_INTEN_TXENDIEN_Msk : Transmitter Empty Interrupt
353 * - \ref UART_INTEN_ABRIEN_Msk : Single-wire Bit Error Detection Interrupt
354 * - \ref UART_INTEN_SWBEIEN_Msk : Auto-baud Rate Interrupt
355 * - \ref UART_INTEN_LINIEN_Msk : Lin Bus Interrupt
356 * - \ref UART_INTEN_WKIEN_Msk : Wake-up Interrupt
357 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error Interrupt
358 * - \ref UART_INTEN_RXTOIEN_Msk : Rx Time-out Interrupt
359 * - \ref UART_INTEN_MODEMIEN_Msk : MODEM Status Interrupt
360 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line Status Interrupt
361 * - \ref UART_INTEN_THREIEN_Msk : Transmit Holding Register Empty Interrupt
362 * - \ref UART_INTEN_RDAIEN_Msk : Receive Data Available Interrupt
363 *
364 * @return None
365 *
366 * @details This macro disable specified UART interrupt.
367 * \hideinitializer
368 */
369 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
370
371
372 /**
373 * @brief Get specified interrupt flag/status
374 *
375 * @param[in] uart The pointer of the specified UART module
376 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
377 * - \ref UART_INTSTS_ABRINT_Msk : Auto-baud Rate Interrupt Indicator
378 * - \ref UART_INTSTS_HWBUFEINT_Msk : PDMA Mode Buffer Error Interrupt Indicator
379 * - \ref UART_INTSTS_HWTOINT_Msk : PDMA Mode Rx Time-out Interrupt Indicator
380 * - \ref UART_INTSTS_HWMODINT_Msk : PDMA Mode MODEM Status Interrupt Indicator
381 * - \ref UART_INTSTS_HWRLSINT_Msk : PDMA Mode Receive Line Status Interrupt Indicator
382 * - \ref UART_INTSTS_TXENDINT_Msk : Transmitter Empty Interrupt Indicator
383 * - \ref UART_INTSTS_SWBEINT_Msk : Single-wire Bit Error Detect Interrupt Indicator
384 * - \ref UART_INTSTS_TXENDIF_Msk : Transmitter Empty Interrupt Flag
385 * - \ref UART_INTSTS_HWBUFEIF_Msk : PDMA Mode Buffer Error Interrupt Flag
386 * - \ref UART_INTSTS_HWTOIF_Msk : PDMA Mode Time-out Interrupt Flag
387 * - \ref UART_INTSTS_HWMODIF_Msk : PDMA Mode MODEM Status Interrupt Flag
388 * - \ref UART_INTSTS_HWRLSIF_Msk : PDMA Mode Receive Line Status Flag
389 * - \ref UART_INTSTS_SWBEIF_Msk : Single-wire Bit Error Detect Interrupt Flag
390 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
391 * - \ref UART_INTSTS_WKINT_Msk : Wake-up Interrupt Indicator
392 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
393 * - \ref UART_INTSTS_RXTOINT_Msk : Rx Time-out Interrupt Indicator
394 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
395 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
396 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
397 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
398 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Interrupt Flag
399 * - \ref UART_INTSTS_WKIF_Msk : Wake-up Interrupt Flag
400 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
401 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
402 * - \ref UART_INTSTS_MODEMIF_Msk : MODEM Status Interrupt Flag
403 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
404 * - \ref UART_INTSTS_THREIF_Msk : Transmit Holding Register Empty Interrupt Flag
405 * - \ref UART_INTSTS_RDAIF_Msk : Receive Data Available Interrupt Flag
406 *
407 * @retval 0 The specified interrupt is not happened.
408 * 1 The specified interrupt is happened.
409 *
410 * @details This macro get specified interrupt flag or interrupt indicator status.
411 * \hideinitializer
412 */
413 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
414
415
416 /**
417 * @brief Clear RS-485 Address Byte Detection Flag
418 *
419 * @param[in] uart The pointer of the specified UART module
420 *
421 * @return None
422 *
423 * @details This macro clear RS-485 address byte detection flag.
424 * \hideinitializer
425 */
426 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
427
428
429 /**
430 * @brief Get RS-485 Address Byte Detection Flag
431 *
432 * @param[in] uart The pointer of the specified UART module
433 *
434 * @retval 0 Receiver detects a data that is not an address bit.
435 * @retval 1 Receiver detects a data that is an address bit.
436 *
437 * @details This macro get RS-485 address byte detection flag.
438 * \hideinitializer
439 */
440 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
441
442 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
443 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart);
444 __STATIC_INLINE void UART_SET_RTS(UART_T* uart);
445
446
447 /**
448 * @brief Set RTS pin to low
449 *
450 * @param[in] uart The pointer of the specified UART module
451 *
452 * @return None
453 *
454 * @details This macro set RTS pin to low.
455 * \hideinitializer
456 */
UART_CLEAR_RTS(UART_T * uart)457 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
458 {
459 uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
460 uart->MODEM &= ~UART_MODEM_RTS_Msk;
461 }
462
463
464 /**
465 * @brief Set RTS pin to high
466 *
467 * @param[in] uart The pointer of the specified UART module
468 *
469 * @return None
470 *
471 * @details This macro set RTS pin to high.
472 * \hideinitializer
473 */
UART_SET_RTS(UART_T * uart)474 __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
475 {
476 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
477 }
478
479 /**
480 * @brief Enable specified UART PDMA function
481 *
482 * @param[in] uart The pointer of the specified UART module
483 * @param[in] u32FuncSel Combination of following functions
484 * - \ref UART_INTEN_TXPDMAEN_Msk
485 * - \ref UART_INTEN_RXPDMAEN_Msk
486 *
487 * @return None
488 *
489 * @details This macro enable specified UART PDMA function.
490 * \hideinitializer
491 */
492 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
493 /**
494 * @brief Disable specified UART PDMA function
495 *
496 * @param[in] uart The pointer of the specified UART module
497 * @param[in] u32FuncSel Combination of following functions
498 * - \ref UART_INTEN_TXPDMAEN_Msk
499 * - \ref UART_INTEN_RXPDMAEN_Msk
500 *
501 * @return None
502 *
503 * @details This macro disable specified UART PDMA function.
504 * \hideinitializer
505 */
506 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
507
508
509 void UART_ClearIntFlag(UART_T* uart, uint32_t u32InterruptFlag);
510 void UART_Close(UART_T* uart);
511 void UART_DisableFlowCtrl(UART_T* uart);
512 void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
513 void UART_EnableFlowCtrl(UART_T* uart);
514 void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
515 void UART_Open(UART_T* uart, uint32_t u32baudrate);
516 uint32_t UART_Read(UART_T* uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
517 void UART_SetLineConfig(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
518 void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
519 void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
520 void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
521 void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
522 uint32_t UART_Write(UART_T* uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
523 void UART_SelectSingleWireMode(UART_T *uart);
524
525
526
527 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
528
529 /*@}*/ /* end of group UART_Driver */
530
531 /*@}*/ /* end of group Standard_Driver */
532
533 #ifdef __cplusplus
534 }
535 #endif
536
537 #endif /*__UART_H__*/
538
