1 /**************************************************************************//** 2 * @file timer_pwm.h 3 * @version V1.00 4 * @brief M480 series Timer PWM Controller(Timer PWM) driver header file 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __TIMER_PWM_H__ 10 #define __TIMER_PWM_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 19 /** @addtogroup Standard_Driver Standard Driver 20 @{ 21 */ 22 /** @addtogroup TIMER_PWM_Driver TIMER PWM Driver 23 @{ 24 */ 25 26 /** @addtogroup TIMER_PWM_EXPORTED_CONSTANTS TIMER PWM Exported Constants 27 @{ 28 */ 29 /*---------------------------------------------------------------------------------------------------------*/ 30 /* Output Channel Constant Definitions */ 31 /*---------------------------------------------------------------------------------------------------------*/ 32 #define TPWM_CH0 (BIT0) /*!< Indicate PWMx_CH0 \hideinitializer */ 33 #define TPWM_CH1 (BIT1) /*!< Indicate PWMx_CH1 \hideinitializer */ 34 35 /*---------------------------------------------------------------------------------------------------------*/ 36 /* Counter Type Constant Definitions */ 37 /*---------------------------------------------------------------------------------------------------------*/ 38 #define TPWM_UP_COUNT (0UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up count type \hideinitializer */ 39 #define TPWM_DOWN_COUNT (1UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Down count type \hideinitializer */ 40 #define TPWM_UP_DOWN_COUNT (2UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up-Down count type \hideinitializer */ 41 42 /*---------------------------------------------------------------------------------------------------------*/ 43 /* Counter Mode Constant Definitions */ 44 /*---------------------------------------------------------------------------------------------------------*/ 45 #define TPWM_AUTO_RELOAD_MODE (0UL) /*!< Auto-reload mode \hideinitializer */ 46 #define TPWM_ONE_SHOT_MODE (TIMER_PWMCTL_CNTMODE_Msk) /*!< One-shot mode \hideinitializer */ 47 48 /*---------------------------------------------------------------------------------------------------------*/ 49 /* Output Level Constant Definitions */ 50 /*---------------------------------------------------------------------------------------------------------*/ 51 #define TPWM_OUTPUT_TOGGLE (0UL) /*!< Timer PWM output toggle \hideinitializer */ 52 #define TPWM_OUTPUT_NOTHING (1UL) /*!< Timer PWM output nothing \hideinitializer */ 53 #define TPWM_OUTPUT_LOW (2UL) /*!< Timer PWM output low \hideinitializer */ 54 #define TPWM_OUTPUT_HIGH (3UL) /*!< Timer PWM output high \hideinitializer */ 55 56 /*---------------------------------------------------------------------------------------------------------*/ 57 /* Trigger ADC Source Select Constant Definitions */ 58 /*---------------------------------------------------------------------------------------------------------*/ 59 #define TPWM_TRIGGER_ADC_AT_ZERO_POINT (0UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter zero point event occurred \hideinitializer */ 60 #define TPWM_TRIGGER_ADC_AT_PERIOD_POINT (1UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter period point event occurred \hideinitializer */ 61 #define TPWM_TRIGGER_ADC_AT_ZERO_OR_PERIOD_POINT (2UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter zero or period point event occurred \hideinitializer */ 62 #define TPWM_TRIGGER_ADC_AT_COMPARE_UP_COUNT_POINT (3UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter up count compare point event occurred \hideinitializer */ 63 #define TPWM_TRIGGER_ADC_AT_COMPARE_DOWN_COUNT_POINT (4UL << TIMER_PWMEADCTS_TRGSEL_Pos) /*!< Timer PWM trigger ADC while counter down count compare point event occurred \hideinitializer */ 64 65 /*---------------------------------------------------------------------------------------------------------*/ 66 /* Brake Control Constant Definitions */ 67 /*---------------------------------------------------------------------------------------------------------*/ 68 #define TPWM_BRAKE_SOURCE_EDGE_ACMP0 (TIMER_PWMBRKCTL_CPO0EBEN_Msk) /*!< Comparator 0 as edge-detect fault brake source \hideinitializer */ 69 #define TPWM_BRAKE_SOURCE_EDGE_ACMP1 (TIMER_PWMBRKCTL_CPO1EBEN_Msk) /*!< Comparator 1 as edge-detect fault brake source \hideinitializer */ 70 #define TPWM_BRAKE_SOURCE_EDGE_BKPIN (TIMER_PWMBRKCTL_BRKPEEN_Msk) /*!< Brake pin as edge-detect fault brake source \hideinitializer */ 71 #define TPWM_BRAKE_SOURCE_EDGE_SYS_CSS (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as edge-detect fault brake source \hideinitializer */ 72 #define TPWM_BRAKE_SOURCE_EDGE_SYS_BOD (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as edge-detect fault brake source \hideinitializer */ 73 #define TPWM_BRAKE_SOURCE_EDGE_SYS_COR (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as edge-detect fault brake source \hideinitializer */ 74 #define TPWM_BRAKE_SOURCE_EDGE_SYS_RAM (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as edge-detect fault brake source \hideinitializer */ 75 76 77 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP0 (TIMER_PWMBRKCTL_CPO0LBEN_Msk) /*!< Comparator 0 as level-detect fault brake source \hideinitializer */ 78 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP1 (TIMER_PWMBRKCTL_CPO1LBEN_Msk) /*!< Comparator 1 as level-detect fault brake source \hideinitializer */ 79 #define TPWM_BRAKE_SOURCE_LEVEL_BKPIN (TIMER_PWMBRKCTL_BRKPLEN_Msk) /*!< Brake pin as level-detect fault brake source \hideinitializer */ 80 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_CSS (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as level-detect fault brake source \hideinitializer */ 81 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_BOD (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as level-detect fault brake source \hideinitializer */ 82 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_COR (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as level-detect fault brake source \hideinitializer */ 83 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_RAM (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as level-detect fault brake source \hideinitializer */ 84 85 #define TPWM_BRAKE_EDGE (TIMER_PWMSWBRK_BRKETRG_Msk) /*!< Edge-detect fault brake \hideinitializer */ 86 #define TPWM_BRAKE_LEVEL (TIMER_PWMSWBRK_BRKLTRG_Msk) /*!< Level-detect fault brake \hideinitializer */ 87 88 /*---------------------------------------------------------------------------------------------------------*/ 89 /* Load Mode Constant Definitions */ 90 /*---------------------------------------------------------------------------------------------------------*/ 91 #define TPWM_LOAD_MODE_PERIOD (0UL) /*!< Timer PWM period load mode \hideinitializer */ 92 #define TPWM_LOAD_MODE_IMMEDIATE (TIMER_PWMCTL_IMMLDEN_Msk) /*!< Timer PWM immediately load mode \hideinitializer */ 93 #define TPWM_LOAD_MODE_CENTER (TIMER_PWMCTL_CTRLD_Msk) /*!< Timer PWM center load mode \hideinitializer */ 94 95 /*---------------------------------------------------------------------------------------------------------*/ 96 /* Brake Pin De-bounce Clock Source Select Constant Definitions */ 97 /*---------------------------------------------------------------------------------------------------------*/ 98 #define TPWM_BKP_DBCLK_PCLK_DIV_1 (0UL) /*!< De-bounce clock is PCLK divide by 1 \hideinitializer */ 99 #define TPWM_BKP_DBCLK_PCLK_DIV_2 (1UL) /*!< De-bounce clock is PCLK divide by 2 \hideinitializer */ 100 #define TPWM_BKP_DBCLK_PCLK_DIV_4 (2UL) /*!< De-bounce clock is PCLK divide by 4 \hideinitializer */ 101 #define TPWM_BKP_DBCLK_PCLK_DIV_8 (3UL) /*!< De-bounce clock is PCLK divide by 8 \hideinitializer */ 102 #define TPWM_BKP_DBCLK_PCLK_DIV_16 (4UL) /*!< De-bounce clock is PCLK divide by 16 \hideinitializer */ 103 #define TPWM_BKP_DBCLK_PCLK_DIV_32 (5UL) /*!< De-bounce clock is PCLK divide by 32 \hideinitializer */ 104 #define TPWM_BKP_DBCLK_PCLK_DIV_64 (6UL) /*!< De-bounce clock is PCLK divide by 64 \hideinitializer */ 105 #define TPWM_BKP_DBCLK_PCLK_DIV_128 (7UL) /*!< De-bounce clock is PCLK divide by 128 \hideinitializer */ 106 107 /*---------------------------------------------------------------------------------------------------------*/ 108 /* Brake Pin Source Select Constant Definitions */ 109 /*---------------------------------------------------------------------------------------------------------*/ 110 #define TPWM_TM_BRAKE0 (0UL) /*!< Brake pin source comes from TM_BRAKE0 \hideinitializer */ 111 #define TPWM_TM_BRAKE1 (1UL) /*!< Brake pin source comes from TM_BRAKE1 \hideinitializer */ 112 #define TPWM_TM_BRAKE2 (2UL) /*!< Brake pin source comes from TM_BRAKE2 \hideinitializer */ 113 #define TPWM_TM_BRAKE3 (3UL) /*!< Brake pin source comes from TM_BRAKE3 \hideinitializer */ 114 115 /*---------------------------------------------------------------------------------------------------------*/ 116 /* Counter Clock Source Select Constant Definitions */ 117 /*---------------------------------------------------------------------------------------------------------*/ 118 #define TPWM_CNTR_CLKSRC_TMR_CLK (0UL) /*!< Timer PWM Clock source selects to TMR_CLK \hideinitializer */ 119 #define TPWM_CNTR_CLKSRC_TIMER0_INT (1UL) /*!< Timer PWM Clock source selects to TIMER0 interrupt event \hideinitializer */ 120 #define TPWM_CNTR_CLKSRC_TIMER1_INT (2UL) /*!< Timer PWM Clock source selects to TIMER1 interrupt event \hideinitializer */ 121 #define TPWM_CNTR_CLKSRC_TIMER2_INT (3UL) /*!< Timer PWM Clock source selects to TIMER2 interrupt event \hideinitializer */ 122 #define TPWM_CNTR_CLKSRC_TIMER3_INT (4UL) /*!< Timer PWM Clock source selects to TIMER3 interrupt event \hideinitializer */ 123 124 /*---------------------------------------------------------------------------------------------------------*/ 125 /* Counter Synchronous Mode Constant Definitions */ 126 /*---------------------------------------------------------------------------------------------------------*/ 127 #define TPWM_CNTR_SYNC_DISABLE (0UL) /*!< Disable TIMER PWM synchronous function \hideinitializer */ 128 #define TPWM_CNTR_SYNC_START_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER0 PWM \hideinitializer */ 129 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER0 PWM \hideinitializer */ 130 #define TPWM_CNTR_SYNC_START_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER2 PWM \hideinitializer */ 131 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER2 PWM \hideinitializer */ 132 133 /*@}*/ /* end of group TIMER_PWM_EXPORTED_CONSTANTS */ 134 135 136 /** @addtogroup TIMER_PWM_EXPORTED_FUNCTIONS TIMER PWM Exported Functions 137 @{ 138 */ 139 140 /** 141 * @brief Enable PWM Counter Mode 142 * 143 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 144 * 145 * @return None 146 * 147 * @details This macro is used to enable specified Timer channel as PWM counter mode, then timer counter mode is invalid. 148 * @note All registers about time counter function will be cleared to 0 and timer clock source will be changed to PCLKx automatically after executing this macro. 149 * \hideinitializer 150 */ 151 #define TPWM_ENABLE_PWM_MODE(timer) ((timer)->ALTCTL = (1 << TIMER_ALTCTL_FUNCSEL_Pos)) 152 153 /** 154 * @brief Disable PWM Counter Mode 155 * 156 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 157 * 158 * @return None 159 * 160 * @details This macro is used to disable specified Timer channel as PWM counter mode, then timer counter mode is available. 161 * @note All registers about PWM counter function will be cleared to 0 after executing this macro. 162 * \hideinitializer 163 */ 164 #define TPWM_DISABLE_PWM_MODE(timer) ((timer)->ALTCTL = (0 << TIMER_ALTCTL_FUNCSEL_Pos)) 165 166 /** 167 * @brief Enable Independent Mode 168 * 169 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 170 * 171 * @return None 172 * 173 * @details This macro is used to enable independent mode of TIMER PWM module and complementary mode will be disabled. 174 * \hideinitializer 175 */ 176 #define TPWM_ENABLE_INDEPENDENT_MODE(timer) ((timer)->PWMCTL &= ~(1 << TIMER_PWMCTL_OUTMODE_Pos)) 177 178 /** 179 * @brief Enable Complementary Mode 180 * 181 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 182 * 183 * @return None 184 * 185 * @details This macro is used to enable complementary mode of Timer PWM module and independent mode will be disabled. 186 * \hideinitializer 187 */ 188 #define TPWM_ENABLE_COMPLEMENTARY_MODE(timer) ((timer)->PWMCTL |= (1 << TIMER_PWMCTL_OUTMODE_Pos)) 189 190 /** 191 * @brief Set Counter Type 192 * 193 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 194 * @param[in] type Timer PWM count type, could be one of the following type 195 * - \ref TPWM_UP_COUNT 196 * - \ref TPWM_DOWN_COUNT 197 * - \ref TPWM_UP_DOWN_COUNT 198 * 199 * @return None 200 * 201 * @details This macro is used to set Timer PWM counter type. 202 * \hideinitializer 203 */ 204 #define TPWM_SET_COUNTER_TYPE(timer, type) ((timer)->PWMCTL = ((timer)->PWMCTL & ~TIMER_PWMCTL_CNTTYPE_Msk) | (type)) 205 206 /** 207 * @brief Start PWM Counter 208 * 209 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 210 * 211 * @return None 212 * 213 * @details This macro is used to enable PWM generator and start counter counting. 214 * \hideinitializer 215 */ 216 #define TPWM_START_COUNTER(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_CNTEN_Msk) 217 218 /** 219 * @brief Stop PWM Counter 220 * 221 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 222 * 223 * @return None 224 * 225 * @details This macro is used to stop PWM counter after current period is completed. 226 * \hideinitializer 227 */ 228 #define TPWM_STOP_COUNTER(timer) ((timer)->PWMPERIOD = 0x0) 229 230 /** 231 * @brief Set Counter Clock Prescaler 232 * 233 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 234 * 235 * @param[in] prescaler Clock prescaler of specified channel. Valid values are between 0x0~0xFFF. 236 * 237 * @return None 238 * 239 * @details This macro is used to set the prescaler of specified TIMER PWM. 240 * @note If prescaler is 0, then there is no scaling in counter clock source. 241 * \hideinitializer 242 */ 243 #define TPWM_SET_PRESCALER(timer, prescaler) ((timer)->PWMCLKPSC = (prescaler)) 244 245 /** 246 * @brief Get Counter Clock Prescaler 247 * 248 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 249 * 250 * @return Target prescaler setting, CLKPSC (TIMERx_PWMCLKPSC[11:0]) 251 * 252 * @details Get the prescaler setting, the target counter clock divider is (CLKPSC + 1). 253 * \hideinitializer 254 */ 255 #define TPWM_GET_PRESCALER(timer) ((timer)->PWMCLKPSC) 256 257 /** 258 * @brief Set Counter Period 259 * 260 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 261 * 262 * @param[in] period Period of specified channel. Valid values are between 0x0~0xFFFF. 263 * 264 * @return None 265 * 266 * @details This macro is used to set the period of specified TIMER PWM. 267 * \hideinitializer 268 */ 269 #define TPWM_SET_PERIOD(timer, period) ((timer)->PWMPERIOD = (period)) 270 271 /** 272 * @brief Get Counter Period 273 * 274 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 275 * 276 * @return Target period setting, PERIOD (TIMERx_PWMPERIOD[15:0]) 277 * 278 * @details This macro is used to get the period of specified TIMER PWM. 279 * \hideinitializer 280 */ 281 #define TPWM_GET_PERIOD(timer) ((timer)->PWMPERIOD) 282 283 /** 284 * @brief Set Comparator Value 285 * 286 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 287 * 288 * @param[in] cmp Comparator of specified channel. Valid values are between 0x0~0xFFFF. 289 * 290 * @return None 291 * 292 * @details This macro is used to set the comparator value of specified TIMER PWM. 293 * \hideinitializer 294 */ 295 #define TPWM_SET_CMPDAT(timer, cmp) ((timer)->PWMCMPDAT = (cmp)) 296 297 /** 298 * @brief Get Comparator Value 299 * 300 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 301 * 302 * @return Target comparator setting, CMPDAT (TIMERx_PWMCMPDAT[15:0]) 303 * 304 * @details This macro is used to get the comparator value of specified TIMER PWM. 305 * \hideinitializer 306 */ 307 #define TPWM_GET_CMPDAT(timer) ((timer)->PWMCMPDAT) 308 309 /** 310 * @brief Clear Counter 311 * 312 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 313 * 314 * @return None 315 * 316 * @details This macro is used to clear counter of specified TIMER PWM. 317 * \hideinitializer 318 */ 319 #define TPWM_CLEAR_COUNTER(timer) ((timer)->PWMCNTCLR = TIMER_PWMCNTCLR_CNTCLR_Msk) 320 321 /** 322 * @brief Software Trigger Brake Event 323 * 324 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 325 * 326 * @param[in] type Type of brake trigger. Valid values are: 327 * - \ref TPWM_BRAKE_EDGE 328 * - \ref TPWM_BRAKE_LEVEL 329 * 330 * @return None 331 * 332 * @details This macro is used to trigger brake event by writing PWMSWBRK register. 333 * \hideinitializer 334 */ 335 #define TPWM_SW_TRIGGER_BRAKE(timer, type) ((timer)->PWMSWBRK = (type)) 336 337 /** 338 * @brief Enable Output Function 339 * 340 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 341 * 342 * @param[in] ch Enable specified channel output function. Valid values are: 343 * - \ref TPWM_CH0 344 * - \ref TPWM_CH1 345 * 346 * @return None 347 * 348 * @details This macro is used to enable output function of specified output pins. 349 * @note If the corresponding bit in u32ChMask parameter is 0, then output function will be disabled in this channel. 350 * \hideinitializer 351 */ 352 #define TPWM_ENABLE_OUTPUT(timer, ch) ((timer)->PWMPOEN = (ch)) 353 354 /** 355 * @brief Set Output Inverse 356 * 357 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 358 * 359 * @param[in] ch Set specified channel output is inversed or not. Valid values are: 360 * - \ref TPWM_CH0 361 * - \ref TPWM_CH1 362 * 363 * @return None 364 * 365 * @details This macro is used to enable output inverse of specified output pins. 366 * @note If u32ChMask parameter is 0, then output inverse function will be disabled. 367 * \hideinitializer 368 */ 369 #define TPWM_SET_OUTPUT_INVERSE(timer, ch) ((timer)->PWMPOLCTL = (ch)) 370 371 /** 372 * @brief Enable Output Function 373 * 374 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 375 * 376 * @param[in] ch Enable specified channel output mask function. Valid values are: 377 * - \ref TPWM_CH0 378 * - \ref TPWM_CH1 379 * 380 * @param[in] level Output to high or low on specified mask channel. 381 * 382 * @return None 383 * 384 * @details This macro is used to enable output function of specified output pins. 385 * @note If u32ChMask parameter is 0, then output mask function will be disabled. 386 * \hideinitializer 387 */ 388 #define TPWM_SET_MASK_OUTPUT(timer, ch, level) do {(timer)->PWMMSKEN = (ch); (timer)->PWMMSK = (level); }while(0) 389 390 /** 391 * @brief Set Counter Synchronous Mode 392 * 393 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 394 * 395 * @param[in] mode Synchronous mode. Possible options are: 396 * - \ref TPWM_CNTR_SYNC_DISABLE 397 * - \ref TPWM_CNTR_SYNC_START_BY_TIMER0 398 * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 399 * - \ref TPWM_CNTR_SYNC_START_BY_TIMER2 400 * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 401 * 402 * @return None 403 * 404 * @details This macro is used to set counter synchronous mode of specified Timer PWM module. 405 * @note Only support all PWM counters are synchronous by TIMER0 PWM or TIMER0~1 PWM counter synchronous by TIMER0 PWM and 406 * TIMER2~3 PWM counter synchronous by TIMER2 PWM. 407 * \hideinitializer 408 */ 409 #define TPWM_SET_COUNTER_SYNC_MODE(timer, mode) ((timer)->PWMSCTL = (mode)) 410 411 /** 412 * @brief Trigger Counter Synchronous 413 * 414 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 415 * 416 * @return None 417 * 418 * @details This macro is used to trigger synchronous event by specified TIMER PWM. 419 * @note 1. This macro is only available for TIMER0 PWM and TIMER2 PWM. \n 420 * 2. STRGEN (PWMSTRG[0]) is write only and always read as 0. 421 * \hideinitializer 422 */ 423 #define TPWM_TRIGGER_COUNTER_SYNC(timer) ((timer)->PWMSTRG = TIMER_PWMSTRG_STRGEN_Msk) 424 425 /** 426 * @brief Enable Zero Event Interrupt 427 * 428 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 429 * 430 * @return None 431 * 432 * @details This macro is used to enable the zero event interrupt function. 433 * \hideinitializer 434 */ 435 #define TPWM_ENABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_ZIEN_Msk) 436 437 /** 438 * @brief Disable Zero Event Interrupt 439 * 440 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 441 * 442 * @return None 443 * 444 * @details This macro is used to disable the zero event interrupt function. 445 * \hideinitializer 446 */ 447 #define TPWM_DISABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_ZIEN_Msk) 448 449 /** 450 * @brief Get Zero Event Interrupt Flag 451 * 452 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 453 * 454 * @retval 0 Zero event interrupt did not occur 455 * @retval 1 Zero event interrupt occurred 456 * 457 * @details This macro indicates zero event occurred or not. 458 * \hideinitializer 459 */ 460 #define TPWM_GET_ZERO_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_ZIF_Msk)? 1 : 0) 461 462 /** 463 * @brief Clear Zero Event Interrupt Flag 464 * 465 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 466 * 467 * @return None 468 * 469 * @details This macro clears zero event interrupt flag. 470 * \hideinitializer 471 */ 472 #define TPWM_CLEAR_ZERO_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_ZIF_Msk) 473 474 /** 475 * @brief Enable Period Event Interrupt 476 * 477 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 478 * 479 * @return None 480 * 481 * @details This macro is used to enable the period event interrupt function. 482 * \hideinitializer 483 */ 484 #define TPWM_ENABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_PIEN_Msk) 485 486 /** 487 * @brief Disable Period Event Interrupt 488 * 489 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 490 * 491 * @return None 492 * 493 * @details This macro is used to disable the period event interrupt function. 494 * \hideinitializer 495 */ 496 #define TPWM_DISABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_PIEN_Msk) 497 498 /** 499 * @brief Get Period Event Interrupt Flag 500 * 501 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 502 * 503 * @retval 0 Period event interrupt did not occur 504 * @retval 1 Period event interrupt occurred 505 * 506 * @details This macro indicates period event occurred or not. 507 * \hideinitializer 508 */ 509 #define TPWM_GET_PERIOD_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_PIF_Msk)? 1 : 0) 510 511 /** 512 * @brief Clear Period Event Interrupt Flag 513 * 514 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 515 * 516 * @return None 517 * 518 * @details This macro clears period event interrupt flag. 519 * \hideinitializer 520 */ 521 #define TPWM_CLEAR_PERIOD_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_PIF_Msk) 522 523 /** 524 * @brief Enable Compare Up Event Interrupt 525 * 526 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 527 * 528 * @return None 529 * 530 * @details This macro is used to enable the compare up event interrupt function. 531 * \hideinitializer 532 */ 533 #define TPWM_ENABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPUIEN_Msk) 534 535 /** 536 * @brief Disable Compare Up Event Interrupt 537 * 538 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 539 * 540 * @return None 541 * 542 * @details This macro is used to disable the compare up event interrupt function. 543 * \hideinitializer 544 */ 545 #define TPWM_DISABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPUIEN_Msk) 546 547 /** 548 * @brief Get Compare Up Event Interrupt Flag 549 * 550 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 551 * 552 * @retval 0 Compare up event interrupt did not occur 553 * @retval 1 Compare up event interrupt occurred 554 * 555 * @details This macro indicates compare up event occurred or not. 556 * \hideinitializer 557 */ 558 #define TPWM_GET_CMP_UP_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPUIF_Msk)? 1 : 0) 559 560 /** 561 * @brief Clear Compare Up Event Interrupt Flag 562 * 563 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 564 * 565 * @return None 566 * 567 * @details This macro clears compare up event interrupt flag. 568 * \hideinitializer 569 */ 570 #define TPWM_CLEAR_CMP_UP_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPUIF_Msk) 571 572 /** 573 * @brief Enable Compare Down Event Interrupt 574 * 575 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 576 * 577 * @return None 578 * 579 * @details This macro is used to enable the compare down event interrupt function. 580 * \hideinitializer 581 */ 582 #define TPWM_ENABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPDIEN_Msk) 583 584 /** 585 * @brief Disable Compare Down Event Interrupt 586 * 587 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 588 * 589 * @return None 590 * 591 * @details This macro is used to disable the compare down event interrupt function. 592 * \hideinitializer 593 */ 594 #define TPWM_DISABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPDIEN_Msk) 595 596 /** 597 * @brief Get Compare Down Event Interrupt Flag 598 * 599 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 600 * 601 * @retval 0 Compare down event interrupt did not occur 602 * @retval 1 Compare down event interrupt occurred 603 * 604 * @details This macro indicates compare down event occurred or not. 605 * \hideinitializer 606 */ 607 #define TPWM_GET_CMP_DOWN_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPDIF_Msk)? 1 : 0) 608 609 /** 610 * @brief Clear Compare Down Event Interrupt Flag 611 * 612 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 613 * 614 * @return None 615 * 616 * @details This macro clears compare down event interrupt flag. 617 * \hideinitializer 618 */ 619 #define TPWM_CLEAR_CMP_DOWN_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPDIF_Msk) 620 621 /** 622 * @brief Get Counter Reach Maximum Count Status 623 * 624 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 625 * 626 * @retval 0 Timer PWM counter never counts to maximum value 627 * @retval 1 Timer PWM counter counts to maximum value, 0xFFFF 628 * 629 * @details This macro indicates Timer PWM counter has count to 0xFFFF or not. 630 * \hideinitializer 631 */ 632 #define TPWM_GET_REACH_MAX_CNT_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_CNTMAXF_Msk)? 1 : 0) 633 634 /** 635 * @brief Clear Counter Reach Maximum Count Status 636 * 637 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 638 * 639 * @return None 640 * 641 * @details This macro clears reach maximum count status. 642 * \hideinitializer 643 */ 644 #define TPWM_CLEAR_REACH_MAX_CNT_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_CNTMAXF_Msk) 645 646 /** 647 * @brief Get Trigger ADC Status 648 * 649 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 650 * 651 * @retval 0 Trigger ADC start conversion is not occur 652 * @retval 1 Specified counter compare event has trigger ADC start conversion 653 * 654 * @details This macro is used to indicate PWM counter compare event has triggered ADC start conversion. 655 * \hideinitializer 656 */ 657 #define TPWM_GET_TRG_ADC_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_EADCTRGF_Msk)? 1 : 0) 658 659 /** 660 * @brief Clear Trigger ADC Status 661 * 662 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 663 * 664 * @return None 665 * 666 * @details This macro is used to clear PWM counter compare event trigger ADC status. 667 * \hideinitializer 668 */ 669 #define TPWM_CLEAR_TRG_ADC_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_EADCTRGF_Msk) 670 671 /** 672 * @brief Set Brake Event at Brake Pin High or Low-to-High 673 * 674 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 675 * 676 * @return None 677 * 678 * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high. 679 * @note The default brake pin detection is high level or from low to high. 680 * \hideinitializer 681 */ 682 #define TPWM_SET_BRAKE_PIN_HIGH_DETECT(timer) ((timer)->PWMBNF &= ~TIMER_PWMBNF_BRKPINV_Msk) 683 684 /** 685 * @brief Set Brake Event at Brake Pin Low or High-to-Low 686 * 687 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 688 * 689 * @return None 690 * 691 * @details This macro is used to set detect brake event when external brake pin at low level or transfer from high to low. 692 * \hideinitializer 693 */ 694 #define TPWM_SET_BRAKE_PIN_LOW_DETECT(timer) ((timer)->PWMBNF |= TIMER_PWMBNF_BRKPINV_Msk) 695 696 /** 697 * @brief Set External Brake Pin Source 698 * 699 * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3. 700 * @param[in] pin The external brake pin source, could be one of following source 701 * - \ref TPWM_TM_BRAKE0 702 * - \ref TPWM_TM_BRAKE1 703 * - \ref TPWM_TM_BRAKE2 704 * - \ref TPWM_TM_BRAKE3 705 * 706 * @return None 707 * 708 * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high. 709 * \hideinitializer 710 */ 711 #define TPWM_SET_BRAKE_PIN_SOURCE(timer, pin) ((timer)->PWMBNF = ((timer)->PWMBNF & ~TIMER_PWMBNF_BKPINSRC_Msk) | ((pin)<<TIMER_PWMBNF_BKPINSRC_Pos)) 712 713 714 void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc); 715 uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle); 716 void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount); 717 void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount); 718 void TPWM_DisableDeadTime(TIMER_T *timer); 719 void TPWM_EnableCounter(TIMER_T *timer); 720 void TPWM_DisableCounter(TIMER_T *timer); 721 void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition); 722 void TPWM_DisableTriggerADC(TIMER_T *timer); 723 void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource); 724 void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource); 725 void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource); 726 uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource); 727 void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource); 728 void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode); 729 void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel); 730 void TPWM_DisableBrakePinDebounce(TIMER_T *timer); 731 void TPWM_EnableBrakePinInverse(TIMER_T *timer); 732 void TPWM_DisableBrakePinInverse(TIMER_T *timer); 733 void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum); 734 735 /*@}*/ /* end of group TIMER_PWM_EXPORTED_FUNCTIONS */ 736 737 /*@}*/ /* end of group TIMER_PWM_Driver */ 738 739 /*@}*/ /* end of group Standard_Driver */ 740 741 #ifdef __cplusplus 742 } 743 #endif 744 745 #endif /* __TIMER_PWM_H__ */ 746 747
