Home
last modified time | relevance | path

Searched refs:OPCODE_WRSR (Results 1 – 4 of 4) sorted by relevance

/hal_nuvoton-latest/m46x/StdDriver/inc/
Dspim.h83 #define OPCODE_WRSR 0x01U /* Write status register #1 */ macro
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dspim.h83 #define OPCODE_WRSR 0x01U /* Write status register #1 */ macro
/hal_nuvoton-latest/m46x/StdDriver/src/
Dspim.c318 …uint8_t cmdBuf[] = {OPCODE_WRSR, 0x00U}; /* 1-byte Write Status Register #1 command + 1-byte d… in SPIM_WriteStatusRegister()
356 uint8_t cmdBuf[3] = {OPCODE_WRSR, 0U, 0U}; in SPIM_WriteStatusRegister2()
/hal_nuvoton-latest/m48x/StdDriver/src/
Dspim.c292 …uint8_t cmdBuf[] = {OPCODE_WRSR, 0x00U}; /* 1-byte Write Status Register #1 command + 1-byte d… in SPIM_WriteStatusRegister()
330 uint8_t cmdBuf[3] = {OPCODE_WRSR, 0U, 0U}; in SPIM_WriteStatusRegister2()