Searched refs:INTEN1 (Results 1 – 8 of 8) sorted by relevance
691 (pwm)->INTEN1 |= (0x7 << u32BrakeSource); in PWM_EnableFaultBrakeInt()707 (pwm)->INTEN1 &= ~(0x7 << u32BrakeSource); in PWM_DisableFaultBrakeInt()
824 (epwm)->INTEN1 |= (0x7UL << u32BrakeSource); in EPWM_EnableFaultBrakeInt()840 (epwm)->INTEN1 &= ~(0x7UL << u32BrakeSource); in EPWM_DisableFaultBrakeInt()
772 (epwm)->INTEN1 |= (0x7UL << u32BrakeSource); in EPWM_EnableFaultBrakeInt()788 (epwm)->INTEN1 &= ~(0x7UL << u32BrakeSource); in EPWM_DisableFaultBrakeInt()
822 (epwm)->INTEN1 |= (0x7UL << u32BrakeSource); in EPWM_EnableFaultBrakeInt()838 (epwm)->INTEN1 &= ~(0x7UL << u32BrakeSource); in EPWM_DisableFaultBrakeInt()
2212 …__IO uint32_t INTEN1; /*!< [0x00e4] PWM Interrupt Enable Register 1 … member
2722 …__IO uint32_t INTEN1; /*!< [0x00e4] EPWM Interrupt Enable Register 1 … member
2127 …__IO uint32_t INTEN1; /*!< [0x00e4] EPWM Interrupt Enable Register 1 … member
3240 …__IO uint32_t INTEN1; /*!< [0x00e4] EPWM Interrupt Enable Register 1 … member