1;/****************************************************************************** 2; * @file startup_M480.s 3; * @version V1.00 4; * @brief CMSIS Cortex-M4 Core Device Startup File for M480 5; * 6; * SPDX-License-Identifier: Apache-2.0 7; * @copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved. 8;*****************************************************************************/ 9;/* 10;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ 11;*/ 12 13 14; <h> Stack Configuration 15; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 16; </h> 17 18 IF :LNOT: :DEF: Stack_Size 19Stack_Size EQU 0x00000800 20 ENDIF 21 22 AREA STACK, NOINIT, READWRITE, ALIGN=3 23Stack_Mem SPACE Stack_Size 24__initial_sp 25 26 27; <h> Heap Configuration 28; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 29; </h> 30 31 IF :LNOT: :DEF: Heap_Size 32Heap_Size EQU 0x00000100 33 ENDIF 34 35 AREA HEAP, NOINIT, READWRITE, ALIGN=3 36__heap_base 37Heap_Mem SPACE Heap_Size 38__heap_limit 39 40 41 PRESERVE8 42 THUMB 43 44 45; Vector Table Mapped to Address 0 at Reset 46 47 AREA RESET, DATA, READONLY 48 EXPORT __Vectors 49 EXPORT __Vectors_End 50 EXPORT __Vectors_Size 51 52__Vectors DCD __initial_sp ; Top of Stack 53 DCD Reset_Handler ; Reset Handler 54 DCD NMI_Handler ; NMI Handler 55 DCD HardFault_Handler ; Hard Fault Handler 56 DCD MemManage_Handler ; MPU Fault Handler 57 DCD BusFault_Handler ; Bus Fault Handler 58 DCD UsageFault_Handler ; Usage Fault Handler 59 DCD 0 ; Reserved 60 DCD 0 ; Reserved 61 DCD 0 ; Reserved 62 DCD 0 ; Reserved 63 DCD SVC_Handler ; SVCall Handler 64 DCD DebugMon_Handler ; Debug Monitor Handler 65 DCD 0 ; Reserved 66 DCD PendSV_Handler ; PendSV Handler 67 DCD SysTick_Handler ; SysTick Handler 68 69 ; External Interrupts 70 DCD BOD_IRQHandler ; 0: Brown Out detection 71 DCD IRC_IRQHandler ; 1: Internal RC 72 DCD PWRWU_IRQHandler ; 2: Power down wake up 73 DCD RAMPE_IRQHandler ; 3: RAM parity error 74 DCD CKFAIL_IRQHandler ; 4: Clock detection fail 75 DCD Default_Handler ; 5: Reserved 76 DCD RTC_IRQHandler ; 6: Real Time Clock 77 DCD TAMPER_IRQHandler ; 7: Tamper detection 78 DCD WDT_IRQHandler ; 8: Watchdog timer 79 DCD WWDT_IRQHandler ; 9: Window watchdog timer 80 DCD EINT0_IRQHandler ; 10: External Input 0 81 DCD EINT1_IRQHandler ; 11: External Input 1 82 DCD EINT2_IRQHandler ; 12: External Input 2 83 DCD EINT3_IRQHandler ; 13: External Input 3 84 DCD EINT4_IRQHandler ; 14: External Input 4 85 DCD EINT5_IRQHandler ; 15: External Input 5 86 DCD GPA_IRQHandler ; 16: GPIO Port A 87 DCD GPB_IRQHandler ; 17: GPIO Port B 88 DCD GPC_IRQHandler ; 18: GPIO Port C 89 DCD GPD_IRQHandler ; 19: GPIO Port D 90 DCD GPE_IRQHandler ; 20: GPIO Port E 91 DCD GPF_IRQHandler ; 21: GPIO Port F 92 DCD QSPI0_IRQHandler ; 22: QSPI0 93 DCD SPI0_IRQHandler ; 23: SPI0 94 DCD BRAKE0_IRQHandler ; 24: 95 DCD EPWM0P0_IRQHandler ; 25: 96 DCD EPWM0P1_IRQHandler ; 26: 97 DCD EPWM0P2_IRQHandler ; 27: 98 DCD BRAKE1_IRQHandler ; 28: 99 DCD EPWM1P0_IRQHandler ; 29: 100 DCD EPWM1P1_IRQHandler ; 30: 101 DCD EPWM1P2_IRQHandler ; 31: 102 DCD TMR0_IRQHandler ; 32: Timer 0 103 DCD TMR1_IRQHandler ; 33: Timer 1 104 DCD TMR2_IRQHandler ; 34: Timer 2 105 DCD TMR3_IRQHandler ; 35: Timer 3 106 DCD UART0_IRQHandler ; 36: UART0 107 DCD UART1_IRQHandler ; 37: UART1 108 DCD I2C0_IRQHandler ; 38: I2C0 109 DCD I2C1_IRQHandler ; 39: I2C1 110 DCD PDMA_IRQHandler ; 40: Peripheral DMA 111 DCD DAC_IRQHandler ; 41: DAC 112 DCD EADC00_IRQHandler ; 42: EADC0 interrupt source 0 113 DCD EADC01_IRQHandler ; 43: EADC0 interrupt source 1 114 DCD ACMP01_IRQHandler ; 44: ACMP0 and ACMP1 115 DCD Default_Handler ; 45: Reserved 116 DCD EADC02_IRQHandler ; 46: EADC0 interrupt source 2 117 DCD EADC03_IRQHandler ; 47: EADC0 interrupt source 3 118 DCD UART2_IRQHandler ; 48: UART2 119 DCD UART3_IRQHandler ; 49: UART3 120 DCD QSPI1_IRQHandler ; 50: QSPI1 121 DCD SPI1_IRQHandler ; 51: SPI1 122 DCD SPI2_IRQHandler ; 52: SPI2 123 DCD USBD_IRQHandler ; 53: USB device 124 DCD OHCI_IRQHandler ; 54: OHCI 125 DCD USBOTG_IRQHandler ; 55: USB OTG 126 DCD CAN0_IRQHandler ; 56: CAN0 127 DCD CAN1_IRQHandler ; 57: CAN1 128 DCD SC0_IRQHandler ; 58: 129 DCD SC1_IRQHandler ; 59: 130 DCD SC2_IRQHandler ; 60: 131 DCD Default_Handler ; 61: 132 DCD SPI3_IRQHandler ; 62: SPI3 133 DCD Default_Handler ; 63: 134 DCD SDH0_IRQHandler ; 64: SDH0 135 DCD USBD20_IRQHandler ; 65: USBD20 136 DCD EMAC_TX_IRQHandler ; 66: EMAC_TX 137 DCD EMAC_RX_IRQHandler ; 67: EMAX_RX 138 DCD I2S0_IRQHandler ; 68: I2S0 139 DCD Default_Handler ; 69: ToDo: Add description to this Interrupt 140 DCD OPA0_IRQHandler ; 70: OPA0 141 DCD CRYPTO_IRQHandler ; 71: CRYPTO 142 DCD GPG_IRQHandler ; 72: 143 DCD EINT6_IRQHandler ; 73: 144 DCD UART4_IRQHandler ; 74: UART4 145 DCD UART5_IRQHandler ; 75: UART5 146 DCD USCI0_IRQHandler ; 76: USCI0 147 DCD USCI1_IRQHandler ; 77: USCI1 148 DCD BPWM0_IRQHandler ; 78: BPWM0 149 DCD BPWM1_IRQHandler ; 79: BPWM1 150 DCD SPIM_IRQHandler ; 80: SPIM 151 DCD CCAP_IRQHandler ; 81: CCAP 152 DCD I2C2_IRQHandler ; 82: I2C2 153 DCD Default_Handler ; 83: 154 DCD QEI0_IRQHandler ; 84: QEI0 155 DCD QEI1_IRQHandler ; 85: QEI1 156 DCD ECAP0_IRQHandler ; 86: ECAP0 157 DCD ECAP1_IRQHandler ; 87: ECAP1 158 DCD GPH_IRQHandler ; 88: 159 DCD EINT7_IRQHandler ; 89: 160 DCD SDH1_IRQHandler ; 90: SDH1 161 DCD Default_Handler ; 91: 162 DCD EHCI_IRQHandler ; 92: EHCI 163 DCD USBOTG20_IRQHandler ; 93: 164 DCD Default_Handler ; 94: 165 DCD Default_Handler ; 95: 166 DCD Default_Handler ; 96: 167 DCD Default_Handler ; 97: 168 DCD Default_Handler ; 98: 169 DCD Default_Handler ; 99: 170 DCD Default_Handler ; 100: 171 DCD TRNG_IRQHandler ; 101: TRNG 172 DCD UART6_IRQHandler ; 102: UART6 173 DCD UART7_IRQHandler ; 103: UART7 174 DCD EADC10_IRQHandler ; 104: EADC1 interrupt source 0 175 DCD EADC11_IRQHandler ; 105: EADC1 interrupt source 1 176 DCD EADC12_IRQHandler ; 106: EADC1 interrupt source 2 177 DCD EADC13_IRQHandler ; 107: EADC1 interrupt source 3 178 DCD CAN2_IRQHandler ; 108: CAN2 179 180 181__Vectors_End 182 183__Vectors_Size EQU __Vectors_End - __Vectors 184 185 AREA |.text|, CODE, READONLY 186 187 188; Reset Handler 189 190Reset_Handler PROC 191 EXPORT Reset_Handler [WEAK] 192 IMPORT SystemInit 193 IMPORT __main 194 195 ; Unlock Register 196 LDR R0, =0x40000100 197 LDR R1, =0x59 198 STR R1, [R0] 199 LDR R1, =0x16 200 STR R1, [R0] 201 LDR R1, =0x88 202 STR R1, [R0] 203 204 IF :LNOT: :DEF: ENABLE_SPIM_CACHE 205 LDR R0, =0x40000200 ; R0 = Clock Controller Register Base Address 206 LDR R1, [R0,#0x4] ; R1 = 0x40000204 (AHBCLK) 207 ORR R1, R1, #0x4000 208 STR R1, [R0,#0x4] ; CLK->AHBCLK |= CLK_AHBCLK_SPIMCKEN_Msk; 209 210 LDR R0, =0x40007000 ; R0 = SPIM Register Base Address 211 LDR R1, [R0,#4] ; R1 = SPIM->CTL1 212 ORR R1, R1,#2 ; R1 |= SPIM_CTL1_CACHEOFF_Msk 213 STR R1, [R0,#4] ; _SPIM_DISABLE_CACHE() 214 LDR R1, [R0,#4] ; R1 = SPIM->CTL1 215 ORR R1, R1, #4 ; R1 |= SPIM_CTL1_CCMEN_Msk 216 STR R1, [R0,#4] ; _SPIM_ENABLE_CCM() 217 ENDIF 218 219 LDR R0, =SystemInit 220 BLX R0 221 222 ; Init POR 223 ; LDR R2, =0x40000024 224 ; LDR R1, =0x00005AA5 225 ; STR R1, [R2] 226 227 ; Lock 228 LDR R0, =0x40000100 229 LDR R1, =0 230 STR R1, [R0] 231 232 LDR R0, =__main 233 BX R0 234 235 ENDP 236 237 238; Dummy Exception Handlers (infinite loops which can be modified) 239 240NMI_Handler PROC 241 EXPORT NMI_Handler [WEAK] 242 B . 243 ENDP 244HardFault_Handler\ 245 PROC 246 EXPORT HardFault_Handler [WEAK] 247 B . 248 ENDP 249MemManage_Handler\ 250 PROC 251 EXPORT MemManage_Handler [WEAK] 252 B . 253 ENDP 254BusFault_Handler\ 255 PROC 256 EXPORT BusFault_Handler [WEAK] 257 B . 258 ENDP 259UsageFault_Handler\ 260 PROC 261 EXPORT UsageFault_Handler [WEAK] 262 B . 263 ENDP 264SVC_Handler PROC 265 EXPORT SVC_Handler [WEAK] 266 B . 267 ENDP 268DebugMon_Handler\ 269 PROC 270 EXPORT DebugMon_Handler [WEAK] 271 B . 272 ENDP 273PendSV_Handler\ 274 PROC 275 EXPORT PendSV_Handler [WEAK] 276 B . 277 ENDP 278SysTick_Handler\ 279 PROC 280 EXPORT SysTick_Handler [WEAK] 281 B . 282 ENDP 283 284Default_Handler PROC 285 286 EXPORT BOD_IRQHandler [WEAK] 287 EXPORT IRC_IRQHandler [WEAK] 288 EXPORT PWRWU_IRQHandler [WEAK] 289 EXPORT RAMPE_IRQHandler [WEAK] 290 EXPORT CKFAIL_IRQHandler [WEAK] 291 EXPORT RTC_IRQHandler [WEAK] 292 EXPORT TAMPER_IRQHandler [WEAK] 293 EXPORT WDT_IRQHandler [WEAK] 294 EXPORT WWDT_IRQHandler [WEAK] 295 EXPORT EINT0_IRQHandler [WEAK] 296 EXPORT EINT1_IRQHandler [WEAK] 297 EXPORT EINT2_IRQHandler [WEAK] 298 EXPORT EINT3_IRQHandler [WEAK] 299 EXPORT EINT4_IRQHandler [WEAK] 300 EXPORT EINT5_IRQHandler [WEAK] 301 EXPORT GPA_IRQHandler [WEAK] 302 EXPORT GPB_IRQHandler [WEAK] 303 EXPORT GPC_IRQHandler [WEAK] 304 EXPORT GPD_IRQHandler [WEAK] 305 EXPORT GPE_IRQHandler [WEAK] 306 EXPORT GPF_IRQHandler [WEAK] 307 EXPORT QSPI0_IRQHandler [WEAK] 308 EXPORT SPI0_IRQHandler [WEAK] 309 EXPORT BRAKE0_IRQHandler [WEAK] 310 EXPORT EPWM0P0_IRQHandler [WEAK] 311 EXPORT EPWM0P1_IRQHandler [WEAK] 312 EXPORT EPWM0P2_IRQHandler [WEAK] 313 EXPORT BRAKE1_IRQHandler [WEAK] 314 EXPORT EPWM1P0_IRQHandler [WEAK] 315 EXPORT EPWM1P1_IRQHandler [WEAK] 316 EXPORT EPWM1P2_IRQHandler [WEAK] 317 EXPORT TMR0_IRQHandler [WEAK] 318 EXPORT TMR1_IRQHandler [WEAK] 319 EXPORT TMR2_IRQHandler [WEAK] 320 EXPORT TMR3_IRQHandler [WEAK] 321 EXPORT UART0_IRQHandler [WEAK] 322 EXPORT UART1_IRQHandler [WEAK] 323 EXPORT I2C0_IRQHandler [WEAK] 324 EXPORT I2C1_IRQHandler [WEAK] 325 EXPORT PDMA_IRQHandler [WEAK] 326 EXPORT DAC_IRQHandler [WEAK] 327 EXPORT EADC00_IRQHandler [WEAK] 328 EXPORT EADC01_IRQHandler [WEAK] 329 EXPORT ACMP01_IRQHandler [WEAK] 330 EXPORT EADC02_IRQHandler [WEAK] 331 EXPORT EADC03_IRQHandler [WEAK] 332 EXPORT UART2_IRQHandler [WEAK] 333 EXPORT UART3_IRQHandler [WEAK] 334 EXPORT QSPI1_IRQHandler [WEAK] 335 EXPORT SPI1_IRQHandler [WEAK] 336 EXPORT SPI2_IRQHandler [WEAK] 337 EXPORT USBD_IRQHandler [WEAK] 338 EXPORT OHCI_IRQHandler [WEAK] 339 EXPORT USBOTG_IRQHandler [WEAK] 340 EXPORT CAN0_IRQHandler [WEAK] 341 EXPORT CAN1_IRQHandler [WEAK] 342 EXPORT SC0_IRQHandler [WEAK] 343 EXPORT SC1_IRQHandler [WEAK] 344 EXPORT SC2_IRQHandler [WEAK] 345 EXPORT SPI3_IRQHandler [WEAK] 346 EXPORT SDH0_IRQHandler [WEAK] 347 EXPORT USBD20_IRQHandler [WEAK] 348 EXPORT EMAC_TX_IRQHandler [WEAK] 349 EXPORT EMAC_RX_IRQHandler [WEAK] 350 EXPORT I2S0_IRQHandler [WEAK] 351 EXPORT OPA0_IRQHandler [WEAK] 352 EXPORT CRYPTO_IRQHandler [WEAK] 353 EXPORT GPG_IRQHandler [WEAK] 354 EXPORT EINT6_IRQHandler [WEAK] 355 EXPORT UART4_IRQHandler [WEAK] 356 EXPORT UART5_IRQHandler [WEAK] 357 EXPORT USCI0_IRQHandler [WEAK] 358 EXPORT USCI1_IRQHandler [WEAK] 359 EXPORT BPWM0_IRQHandler [WEAK] 360 EXPORT BPWM1_IRQHandler [WEAK] 361 EXPORT SPIM_IRQHandler [WEAK] 362 EXPORT CCAP_IRQHandler [WEAK] 363 EXPORT I2C2_IRQHandler [WEAK] 364 EXPORT QEI0_IRQHandler [WEAK] 365 EXPORT QEI1_IRQHandler [WEAK] 366 EXPORT ECAP0_IRQHandler [WEAK] 367 EXPORT ECAP1_IRQHandler [WEAK] 368 EXPORT GPH_IRQHandler [WEAK] 369 EXPORT EINT7_IRQHandler [WEAK] 370 EXPORT SDH1_IRQHandler [WEAK] 371 EXPORT EHCI_IRQHandler [WEAK] 372 EXPORT USBOTG20_IRQHandler [WEAK] 373 EXPORT TRNG_IRQHandler [WEAK] 374 EXPORT UART6_IRQHandler [WEAK] 375 EXPORT UART7_IRQHandler [WEAK] 376 EXPORT EADC10_IRQHandler [WEAK] 377 EXPORT EADC11_IRQHandler [WEAK] 378 EXPORT EADC12_IRQHandler [WEAK] 379 EXPORT EADC13_IRQHandler [WEAK] 380 EXPORT CAN2_IRQHandler [WEAK] 381 382Default__IRQHandler 383BOD_IRQHandler 384IRC_IRQHandler 385PWRWU_IRQHandler 386RAMPE_IRQHandler 387CKFAIL_IRQHandler 388RTC_IRQHandler 389TAMPER_IRQHandler 390WDT_IRQHandler 391WWDT_IRQHandler 392EINT0_IRQHandler 393EINT1_IRQHandler 394EINT2_IRQHandler 395EINT3_IRQHandler 396EINT4_IRQHandler 397EINT5_IRQHandler 398GPA_IRQHandler 399GPB_IRQHandler 400GPC_IRQHandler 401GPD_IRQHandler 402GPE_IRQHandler 403GPF_IRQHandler 404QSPI0_IRQHandler 405SPI0_IRQHandler 406BRAKE0_IRQHandler 407EPWM0P0_IRQHandler 408EPWM0P1_IRQHandler 409EPWM0P2_IRQHandler 410BRAKE1_IRQHandler 411EPWM1P0_IRQHandler 412EPWM1P1_IRQHandler 413EPWM1P2_IRQHandler 414TMR0_IRQHandler 415TMR1_IRQHandler 416TMR2_IRQHandler 417TMR3_IRQHandler 418UART0_IRQHandler 419UART1_IRQHandler 420I2C0_IRQHandler 421I2C1_IRQHandler 422PDMA_IRQHandler 423DAC_IRQHandler 424EADC00_IRQHandler 425EADC01_IRQHandler 426ACMP01_IRQHandler 427EADC02_IRQHandler 428EADC03_IRQHandler 429UART2_IRQHandler 430UART3_IRQHandler 431QSPI1_IRQHandler 432SPI1_IRQHandler 433SPI2_IRQHandler 434USBD_IRQHandler 435OHCI_IRQHandler 436USBOTG_IRQHandler 437CAN0_IRQHandler 438CAN1_IRQHandler 439SC0_IRQHandler 440SC1_IRQHandler 441SC2_IRQHandler 442SPI3_IRQHandler 443SDH0_IRQHandler 444USBD20_IRQHandler 445EMAC_TX_IRQHandler 446EMAC_RX_IRQHandler 447I2S0_IRQHandler 448OPA0_IRQHandler 449CRYPTO_IRQHandler 450GPG_IRQHandler 451EINT6_IRQHandler 452UART4_IRQHandler 453UART5_IRQHandler 454USCI0_IRQHandler 455USCI1_IRQHandler 456BPWM0_IRQHandler 457BPWM1_IRQHandler 458SPIM_IRQHandler 459CCAP_IRQHandler 460I2C2_IRQHandler 461QEI0_IRQHandler 462QEI1_IRQHandler 463ECAP0_IRQHandler 464ECAP1_IRQHandler 465GPH_IRQHandler 466EINT7_IRQHandler 467SDH1_IRQHandler 468EHCI_IRQHandler 469USBOTG20_IRQHandler 470TRNG_IRQHandler 471UART6_IRQHandler 472UART7_IRQHandler 473EADC10_IRQHandler 474EADC11_IRQHandler 475EADC12_IRQHandler 476EADC13_IRQHandler 477CAN2_IRQHandler 478 479 480 481 B . 482 ENDP 483 484 485 ALIGN 486 487 488; User Initial Stack & Heap 489 490 IF :DEF:__MICROLIB 491 492 EXPORT __initial_sp 493 EXPORT __heap_base 494 EXPORT __heap_limit 495 496 ELSE 497 498 IMPORT __use_two_region_memory 499 EXPORT __user_initial_stackheap 500 501__user_initial_stackheap PROC 502 LDR R0, = Heap_Mem 503 LDR R1, =(Stack_Mem + Stack_Size) 504 LDR R2, = (Heap_Mem + Heap_Size) 505 LDR R3, = Stack_Mem 506 BX LR 507 ENDP 508 509 ALIGN 510 511 ENDIF 512 513 514 END 515;/*** (C) COPYRIGHT 2017 Nuvoton Technology Corp. ***/ 516
