Searched refs:CPCTL0 (Results 1 – 2 of 2) sorted by relevance
860 #define PSIO_SET_CHECKPOINT(psio, u32Pin, u32CheckPoint, u32Slot) (psio->GNCT[(u32Pin)].CPCTL0= \861 …(psio->GNCT[(u32Pin)].CPCTL0 & ~(PSIO_GNCT_CPCTL0_CKPT0_Msk<<((u32CheckPoint)*PSIO_GNCT_CPCTL0_CKP…892 #define PSIO_CLEAR_CHECKPOINT(psio, u32Pin, u32CheckPoint) (psio->GNCT[(u32Pin)].CPCTL0= \893 …psio->GNCT[(u32Pin)].CPCTL0 & ~(PSIO_GNCT_CPCTL0_CKPT0_Msk<<((u32CheckPoint)*PSIO_GNCT_CPCTL0_CKPT…1177 psio->GNCT[u32Pin].CPCTL0 = *(uint32_t *)sConfig; in PSIO_SET_CP_CONFIG()
503 …__IO uint32_t CPCTL0; /*!< PSIOn Check Point Control Register 0 … member
