Searched refs:CLK_PLLCTL2_FBDIV_Pos (Results 1 – 3 of 3) sorted by relevance
1091 ((u32MinNF - 2) << CLK_PLLCTL2_FBDIV_Pos); in CLK_EnablePLL()1384 u32NF = ((u32Pll2Reg & CLK_PLLCTL2_FBDIV_Msk) >> CLK_PLLCTL2_FBDIV_Pos) + 2UL; in CLK_GetPLLClockFreq()
1900 #define CLK_PLLCTL2_FBDIV_Pos (0) /*!< CLK… macro1901 #define CLK_PLLCTL2_FBDIV_Msk (0x1fful << CLK_PLLCTL2_FBDIV_Pos) /*!< CLK…
340 #define CLK_PLLCTL_NF(x) (((x)-2UL)<<CLK_PLLCTL2_FBDIV_Pos) /*!< x must be constant and 2 <…
