1 /**************************************************************************//**
2 * @file uart.h
3 * @version V3.00
4 * @brief M480 series UART driver header file
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #ifndef __UART_H__
10 #define __UART_H__
11
12
13 #ifdef __cplusplus
14 extern "C"
15 {
16 #endif
17
18
19 /** @addtogroup Standard_Driver Standard Driver
20 @{
21 */
22
23 /** @addtogroup UART_Driver UART Driver
24 @{
25 */
26
27 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
28 @{
29 */
30
31 /*---------------------------------------------------------------------------------------------------------*/
32 /* UART FIFO size constants definitions */
33 /*---------------------------------------------------------------------------------------------------------*/
34
35 #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
36 #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
37 #define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
38 #define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
39 #define UART4_FIFO_SIZE 16ul /*!< UART4 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
40 #define UART5_FIFO_SIZE 16ul /*!< UART5 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */
41
42 /*---------------------------------------------------------------------------------------------------------*/
43 /* UART_FIFO constants definitions */
44 /*---------------------------------------------------------------------------------------------------------*/
45
46 #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */
47 #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */
48 #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */
49 #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */
50
51 #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */
52 #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */
53 #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */
54 #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */
55
56 /*---------------------------------------------------------------------------------------------------------*/
57 /* UART_LINE constants definitions */
58 /*---------------------------------------------------------------------------------------------------------*/
59 #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */
60 #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */
61 #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */
62 #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */
63
64 #define UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */
65 #define UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */
66 #define UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */
67 #define UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */
68 #define UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */
69
70 #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */
71 #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */
72 #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */
73
74
75 /*---------------------------------------------------------------------------------------------------------*/
76 /* UART RTS ACTIVE LEVEL constants definitions */
77 /*---------------------------------------------------------------------------------------------------------*/
78 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */
79 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */
80
81
82 /*---------------------------------------------------------------------------------------------------------*/
83 /* UART_IRDA constants definitions */
84 /*---------------------------------------------------------------------------------------------------------*/
85 #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */
86 #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */
87
88
89 /*---------------------------------------------------------------------------------------------------------*/
90 /* UART_FUNCSEL constants definitions */
91 /*---------------------------------------------------------------------------------------------------------*/
92 #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */
93 #define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */
94 #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */
95 #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */
96
97
98 /*---------------------------------------------------------------------------------------------------------*/
99 /* UART_LINCTL constants definitions */
100 /*---------------------------------------------------------------------------------------------------------*/
101 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 \hideinitializer */
102 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 \hideinitializer */
103 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field \hideinitializer */
104 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field \hideinitializer */
105 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field \hideinitializer */
106 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value \hideinitializer */
107
108
109 /*---------------------------------------------------------------------------------------------------------*/
110 /* UART BAUDRATE MODE constants definitions */
111 /*---------------------------------------------------------------------------------------------------------*/
112 #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */
113 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */
114
115
116 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
117
118
119 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
120 @{
121 */
122
123
124 /**
125 * @brief Calculate UART baudrate mode0 divider
126 *
127 * @param[in] u32SrcFreq UART clock frequency
128 * @param[in] u32BaudRate Baudrate of UART module
129 *
130 * @return UART baudrate mode0 divider
131 *
132 * @details This macro calculate UART baudrate mode0 divider.
133 * \hideinitializer
134 */
135 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul)
136
137
138 /**
139 * @brief Calculate UART baudrate mode2 divider
140 *
141 * @param[in] u32SrcFreq UART clock frequency
142 * @param[in] u32BaudRate Baudrate of UART module
143 *
144 * @return UART baudrate mode2 divider
145 *
146 * @details This macro calculate UART baudrate mode2 divider.
147 * \hideinitializer
148 */
149 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul)
150
151
152 /**
153 * @brief Write UART data
154 *
155 * @param[in] uart The pointer of the specified UART module
156 * @param[in] u8Data Data byte to transmit.
157 *
158 * @return None
159 *
160 * @details This macro write Data to Tx data register.
161 * \hideinitializer
162 */
163 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
164
165
166 /**
167 * @brief Read UART data
168 *
169 * @param[in] uart The pointer of the specified UART module
170 *
171 * @return The oldest data byte in RX FIFO.
172 *
173 * @details This macro read Rx data register.
174 * \hideinitializer
175 */
176 #define UART_READ(uart) ((uart)->DAT)
177
178
179 /**
180 * @brief Get Tx empty
181 *
182 * @param[in] uart The pointer of the specified UART module
183 *
184 * @retval 0 Tx FIFO is not empty
185 * @retval >=1 Tx FIFO is empty
186 *
187 * @details This macro get Transmitter FIFO empty register value.
188 * \hideinitializer
189 */
190 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
191
192
193 /**
194 * @brief Get Rx empty
195 *
196 * @param[in] uart The pointer of the specified UART module
197 *
198 * @retval 0 Rx FIFO is not empty
199 * @retval >=1 Rx FIFO is empty
200 *
201 * @details This macro get Receiver FIFO empty register value.
202 * \hideinitializer
203 */
204 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
205
206
207 /**
208 * @brief Check specified UART port transmission is over.
209 *
210 * @param[in] uart The pointer of the specified UART module
211 *
212 * @retval 0 Tx transmission is not over
213 * @retval 1 Tx transmission is over
214 *
215 * @details This macro return Transmitter Empty Flag register bit value.
216 * It indicates if specified UART port transmission is over nor not.
217 * \hideinitializer
218 */
219 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
220
221
222 /**
223 * @brief Wait specified UART port transmission is over
224 *
225 * @param[in] uart The pointer of the specified UART module
226 *
227 * @return None
228 *
229 * @details This macro wait specified UART port transmission is over.
230 * \hideinitializer
231 */
232 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
233
234
235 /**
236 * @brief Check RX is ready or not
237 *
238 * @param[in] uart The pointer of the specified UART module
239 *
240 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
241 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
242 *
243 * @details This macro check receive data available interrupt flag is set or not.
244 * \hideinitializer
245 */
246 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
247
248
249 /**
250 * @brief Check TX FIFO is full or not
251 *
252 * @param[in] uart The pointer of the specified UART module
253 *
254 * @retval 1 TX FIFO is full
255 * @retval 0 TX FIFO is not full
256 *
257 * @details This macro check TX FIFO is full or not.
258 * \hideinitializer
259 */
260 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
261
262
263 /**
264 * @brief Check RX FIFO is full or not
265 *
266 * @param[in] uart The pointer of the specified UART module
267 *
268 * @retval 1 RX FIFO is full
269 * @retval 0 RX FIFO is not full
270 *
271 * @details This macro check RX FIFO is full or not.
272 * \hideinitializer
273 */
274 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
275
276
277 /**
278 * @brief Get Tx full register value
279 *
280 * @param[in] uart The pointer of the specified UART module
281 *
282 * @retval 0 Tx FIFO is not full.
283 * @retval >=1 Tx FIFO is full.
284 *
285 * @details This macro get Tx full register value.
286 * \hideinitializer
287 */
288 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
289
290
291 /**
292 * @brief Get Rx full register value
293 *
294 * @param[in] uart The pointer of the specified UART module
295 *
296 * @retval 0 Rx FIFO is not full.
297 * @retval >=1 Rx FIFO is full.
298 *
299 * @details This macro get Rx full register value.
300 * \hideinitializer
301 */
302 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
303
304
305 /**
306 * @brief Enable specified UART interrupt
307 *
308 * @param[in] uart The pointer of the specified UART module
309 * @param[in] u32eIntSel Interrupt type select
310 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
311 * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
312 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
313 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
314 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
315 * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
316 * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
317 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
318 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
319 *
320 * @return None
321 *
322 * @details This macro enable specified UART interrupt.
323 * \hideinitializer
324 */
325 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
326
327
328 /**
329 * @brief Disable specified UART interrupt
330 *
331 * @param[in] uart The pointer of the specified UART module
332 * @param[in] u32eIntSel Interrupt type select
333 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
334 * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt
335 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
336 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
337 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
338 * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt
339 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt
340 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
341 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
342 *
343 * @return None
344 *
345 * @details This macro enable specified UART interrupt.
346 * \hideinitializer
347 */
348 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
349
350
351 /**
352 * @brief Get specified interrupt flag/status
353 *
354 * @param[in] uart The pointer of the specified UART module
355 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
356 * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator
357 * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator
358 * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator
359 * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator
360 * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag
361 * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag
362 * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag
363 * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag
364 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
365 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
366 * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator
367 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
368 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
369 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
370 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
371 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag
372 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
373 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
374 * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag
375 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
376 * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag
377 * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag
378 *
379 * @retval 0 The specified interrupt is not happened.
380 * 1 The specified interrupt is happened.
381 *
382 * @details This macro get specified interrupt flag or interrupt indicator status.
383 * \hideinitializer
384 */
385 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
386
387
388 /**
389 * @brief Clear RS-485 Address Byte Detection Flag
390 *
391 * @param[in] uart The pointer of the specified UART module
392 *
393 * @return None
394 *
395 * @details This macro clear RS-485 address byte detection flag.
396 * \hideinitializer
397 */
398 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
399
400
401 /**
402 * @brief Get RS-485 Address Byte Detection Flag
403 *
404 * @param[in] uart The pointer of the specified UART module
405 *
406 * @retval 0 Receiver detects a data that is not an address bit.
407 * @retval 1 Receiver detects a data that is an address bit.
408 *
409 * @details This macro get RS-485 address byte detection flag.
410 * \hideinitializer
411 */
412 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
413
414 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
415 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart);
416 __STATIC_INLINE void UART_SET_RTS(UART_T* uart);
417
418
419 /**
420 * @brief Set RTS pin to low
421 *
422 * @param[in] uart The pointer of the specified UART module
423 *
424 * @return None
425 *
426 * @details This macro set RTS pin to low.
427 */
UART_CLEAR_RTS(UART_T * uart)428 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
429 {
430 uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
431 uart->MODEM &= ~UART_MODEM_RTS_Msk;
432 }
433
434
435 /**
436 * @brief Set RTS pin to high
437 *
438 * @param[in] uart The pointer of the specified UART module
439 *
440 * @return None
441 *
442 * @details This macro set RTS pin to high.
443 */
UART_SET_RTS(UART_T * uart)444 __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
445 {
446 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
447 }
448
449 /**
450 * @brief Enable specified UART PDMA function
451 *
452 * @param[in] uart The pointer of the specified UART module
453 * @param[in] u32FuncSel Combination of following functions
454 * - \ref UART_INTEN_TXPDMAEN_Msk
455 * - \ref UART_INTEN_RXPDMAEN_Msk
456 *
457 * @return None
458 *
459 * \hideinitializer
460 */
461 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
462 /**
463 * @brief Disable specified UART PDMA function
464 *
465 * @param[in] uart The pointer of the specified UART module
466 * @param[in] u32FuncSel Combination of following functions
467 * - \ref UART_INTEN_TXPDMAEN_Msk
468 * - \ref UART_INTEN_RXPDMAEN_Msk
469 *
470 * @return None
471 *
472 * \hideinitializer
473 */
474 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
475
476
477 void UART_ClearIntFlag(UART_T* uart, uint32_t u32InterruptFlag);
478 void UART_Close(UART_T* uart);
479 void UART_DisableFlowCtrl(UART_T* uart);
480 void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
481 void UART_EnableFlowCtrl(UART_T* uart);
482 void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
483 void UART_Open(UART_T* uart, uint32_t u32baudrate);
484 uint32_t UART_Read(UART_T* uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes);
485 void UART_SetLineConfig(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
486 void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
487 void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
488 void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
489 void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
490 uint32_t UART_Write(UART_T* uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes);
491
492
493
494
495 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
496
497 /*@}*/ /* end of group UART_Driver */
498
499 /*@}*/ /* end of group Standard_Driver */
500
501 #ifdef __cplusplus
502 }
503 #endif
504
505 #endif /*__UART_H__*/
506
507 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
508
