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Searched refs:SYS_GPB_MFPL_PB5MFP_Pos (Results 1 – 2 of 2) sorted by relevance

/hal_nuvoton-3.4.0/m48x/StdDriver/inc/
Dsys.h440 #define SYS_GPB_MFPL_PB5MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< General purpo…
441 #define SYS_GPB_MFPL_PB5MFP_ACMP1_N (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< Analog compar…
442 #define SYS_GPB_MFPL_PB5MFP_EADC0_CH5 (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< EADC0 channel…
443 #define SYS_GPB_MFPL_PB5MFP_EBI_ADR0 (0x02UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< EBI address/d…
444 #define SYS_GPB_MFPL_PB5MFP_SD0_DAT3 (0x03UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< SD/SDIO 0 dat…
445 #define SYS_GPB_MFPL_PB5MFP_EMAC_RMII_REFCLK (0x04UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< EMAC mode clo…
446 #define SYS_GPB_MFPL_PB5MFP_SPI1_MISO (0x05UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< 1st SPI1 MISO…
447 #define SYS_GPB_MFPL_PB5MFP_I2C0_SCL (0x06UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< I2C0 clock pi…
448 #define SYS_GPB_MFPL_PB5MFP_UART5_TXD (0x07UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< Data transmit…
449 #define SYS_GPB_MFPL_PB5MFP_USCI1_CTL0 (0x08UL<<SYS_GPB_MFPL_PB5MFP_Pos) /*!< USCI1 control…
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/hal_nuvoton-3.4.0/m48x/Devices/M480/Include/
Dsys_reg.h2531 #define SYS_GPB_MFPL_PB5MFP_Pos (20) /*!< SYS… macro
2532 #define SYS_GPB_MFPL_PB5MFP_Msk (0xful << SYS_GPB_MFPL_PB5MFP_Pos) /*!< SYS…