1 /**************************************************************************//** 2 * @file scuart.h 3 * @version V1.00 4 * @brief M480 Smartcard UART mode (SCUART) driver header file 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __SCUART_H__ 10 #define __SCUART_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup SCUART_Driver SCUART Driver 23 @{ 24 */ 25 26 /** @addtogroup SCUART_EXPORTED_CONSTANTS SCUART Exported Constants 27 @{ 28 */ 29 #define SCUART_CHAR_LEN_5 (0x3ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 5 bits \hideinitializer */ 30 #define SCUART_CHAR_LEN_6 (0x2ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 6 bits \hideinitializer */ 31 #define SCUART_CHAR_LEN_7 (0x1ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 7 bits \hideinitializer */ 32 #define SCUART_CHAR_LEN_8 (0UL) /*!< Set SCUART word length to 8 bits \hideinitializer */ 33 34 #define SCUART_PARITY_NONE (SC_UARTCTL_PBOFF_Msk) /*!< Set SCUART transfer with no parity \hideinitializer */ 35 #define SCUART_PARITY_ODD (SC_UARTCTL_OPE_Msk) /*!< Set SCUART transfer with odd parity \hideinitializer */ 36 #define SCUART_PARITY_EVEN (0UL) /*!< Set SCUART transfer with even parity \hideinitializer */ 37 38 #define SCUART_STOP_BIT_1 (SC_CTL_NSB_Msk) /*!< Set SCUART transfer with one stop bit \hideinitializer */ 39 #define SCUART_STOP_BIT_2 (0UL) /*!< Set SCUART transfer with two stop bits \hideinitializer */ 40 41 42 /*@}*/ /* end of group SCUART_EXPORTED_CONSTANTS */ 43 44 45 /** @addtogroup SCUART_EXPORTED_FUNCTIONS SCUART Exported Functions 46 @{ 47 */ 48 49 /* TX Macros */ 50 /** 51 * @brief Write Data to Tx data register 52 * @param[in] sc The base address of smartcard module. 53 * @param[in] u8Data Data byte to transmit 54 * @return None 55 * \hideinitializer 56 */ 57 #define SCUART_WRITE(sc, u8Data) ((sc)->DAT = (u8Data)) 58 59 /** 60 * @brief Get TX FIFO empty flag status from register 61 * @param[in] sc The base address of smartcard module 62 * @return Transmit FIFO empty status 63 * @retval 0 Transmit FIFO is not empty 64 * @retval SC_STATUS_TXEMPTY_Msk Transmit FIFO is empty 65 * \hideinitializer 66 */ 67 #define SCUART_GET_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXEMPTY_Msk) 68 69 /** 70 * @brief Get TX FIFO full flag status from register 71 * @param[in] sc The base address of smartcard module 72 * @return Transmit FIFO full status 73 * @retval 0 Transmit FIFO is not full 74 * @retval SC_STATUS_TXFULL_Msk Transmit FIFO is full 75 * \hideinitializer 76 */ 77 #define SCUART_GET_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk) 78 79 /** 80 * @brief Wait specified smartcard port transmission complete 81 * @param[in] sc The base address of smartcard module 82 * @return None 83 * @note This Macro blocks until transmit complete. 84 * \hideinitializer 85 */ 86 #define SCUART_WAIT_TX_EMPTY(sc) while((sc)->STATUS & SC_STATUS_TXACT_Msk) 87 88 /** 89 * @brief Check specified smartcard port transmit FIFO is full or not 90 * @param[in] sc The base address of smartcard module 91 * @return Transmit FIFO full status 92 * @retval 0 Transmit FIFO is not full 93 * @retval 1 Transmit FIFO is full 94 * \hideinitializer 95 */ 96 #define SCUART_IS_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk ? 1 : 0) 97 98 /** 99 * @brief Check specified smartcard port transmission is over 100 * @param[in] sc The base address of smartcard module 101 * @return Transmit complete status 102 * @retval 0 Transmit is not complete 103 * @retval 1 Transmit complete 104 * \hideinitializer 105 */ 106 #define SCUART_IS_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXACT_Msk ? 0 : 1) 107 108 /** 109 * @brief Check specified Smartcard port Transmission Status 110 * @param[in] sc The pointer of smartcard module. 111 * @retval 0 Transmit is completed 112 * @retval 1 Transmit is active 113 * @details TXACT (SC_STATUS[31]) is set by hardware when Tx transfer is in active and the STOP bit of the last byte has been transmitted. 114 * \hideinitializer 115 */ 116 #define SCUART_IS_TX_ACTIVE(sc) (((sc)->STATUS & SC_STATUS_TXACT_Msk)? 1 : 0) 117 118 /* RX Macros */ 119 120 /** 121 * @brief Read Rx data register 122 * @param[in] sc The base address of smartcard module 123 * @return The oldest data byte in RX FIFO 124 * \hideinitializer 125 */ 126 #define SCUART_READ(sc) ((sc)->DAT) 127 128 /** 129 * @brief Get RX FIFO empty flag status from register 130 * @param[in] sc The base address of smartcard module 131 * @return Receive FIFO empty status 132 * @retval 0 Receive FIFO is not empty 133 * @retval SC_STATUS_RXEMPTY_Msk Receive FIFO is empty 134 * \hideinitializer 135 */ 136 #define SCUART_GET_RX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_RXEMPTY_Msk) 137 138 139 /** 140 * @brief Get RX FIFO full flag status from register 141 * @param[in] sc The base address of smartcard module 142 * @return Receive FIFO full status 143 * @retval 0 Receive FIFO is not full 144 * @retval SC_STATUS_RXFULLF_Msk Receive FIFO is full 145 * \hideinitializer 146 */ 147 #define SCUART_GET_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk) 148 149 /** 150 * @brief Check if receive data number in FIFO reach FIFO trigger level or not 151 * @param[in] sc The base address of smartcard module 152 * @return Receive FIFO data status 153 * @retval 0 The number of bytes in receive FIFO is less than trigger level 154 * @retval 1 The number of bytes in receive FIFO equals or larger than trigger level 155 * @note If receive trigger level is \b not 1 byte, this macro return 0 does not necessary indicates there is \b no data in FIFO 156 * \hideinitializer 157 */ 158 #define SCUART_IS_RX_READY(sc) ((sc)->INTSTS & SC_INTSTS_RDAIF_Msk ? 1 : 0) 159 160 /** 161 * @brief Check specified smartcard port receive FIFO is full or not 162 * @param[in] sc The base address of smartcard module 163 * @return Receive FIFO full status 164 * @retval 0 Receive FIFO is not full 165 * @retval 1 Receive FIFO is full 166 * \hideinitializer 167 */ 168 #define SCUART_IS_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk ? 1 : 0) 169 170 /* Interrupt Macros */ 171 172 /** 173 * @brief Enable specified interrupts 174 * @param[in] sc The base address of smartcard module 175 * @param[in] u32Mask Interrupt masks to enable, a combination of following bits 176 * - \ref SC_INTEN_RXTOIEN_Msk 177 * - \ref SC_INTEN_TERRIEN_Msk 178 * - \ref SC_INTEN_TBEIEN_Msk 179 * - \ref SC_INTEN_RDAIEN_Msk 180 * @return None 181 * \hideinitializer 182 */ 183 #define SCUART_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask)) 184 185 /** 186 * @brief Disable specified interrupts 187 * @param[in] sc The base address of smartcard module 188 * @param[in] u32Mask Interrupt masks to disable, a combination of following bits 189 * - \ref SC_INTEN_RXTOIEN_Msk 190 * - \ref SC_INTEN_TERRIEN_Msk 191 * - \ref SC_INTEN_TBEIEN_Msk 192 * - \ref SC_INTEN_RDAIEN_Msk 193 * @return None 194 * \hideinitializer 195 */ 196 #define SCUART_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask)) 197 198 /** 199 * @brief Get specified interrupt flag/status 200 * @param[in] sc The base address of smartcard module 201 * @param[in] u32Type Interrupt flag/status to check, could be one of following value 202 * - \ref SC_INTSTS_RXTOIF_Msk 203 * - \ref SC_INTSTS_TERRIF_Msk 204 * - \ref SC_INTSTS_TBEIF_Msk 205 * - \ref SC_INTSTS_RDAIF_Msk 206 * @return The status of specified interrupt 207 * @retval 0 Specified interrupt does not happened 208 * @retval 1 Specified interrupt happened 209 * \hideinitializer 210 */ 211 #define SCUART_GET_INT_FLAG(sc, u32Type) ((sc)->INTSTS & (u32Type) ? 1 : 0) 212 213 /** 214 * @brief Clear specified interrupt flag/status 215 * @param[in] sc The base address of smartcard module 216 * @param[in] u32Type Interrupt flag/status to clear, could be the combination of following values 217 * - \ref SC_INTSTS_RXTOIF_Msk 218 * - \ref SC_INTSTS_TERRIF_Msk 219 * - \ref SC_INTSTS_TBEIF_Msk 220 * @return None 221 * \hideinitializer 222 */ 223 #define SCUART_CLR_INT_FLAG(sc, u32Type) ((sc)->INTSTS = (u32Type)) 224 225 /** 226 * @brief Get receive error flag/status 227 * @param[in] sc The base address of smartcard module 228 * @return Current receive error status, could one of following errors: 229 * @retval SC_STATUS_PEF_Msk Parity error 230 * @retval SC_STATUS_FEF_Msk Frame error 231 * @retval SC_STATUS_BEF_Msk Break error 232 * \hideinitializer 233 */ 234 #define SCUART_GET_ERR_FLAG(sc) ((sc)->STATUS & (SC_STATUS_PEF_Msk | SC_STATUS_FEF_Msk | SC_STATUS_BEF_Msk)) 235 236 /** 237 * @brief Clear specified receive error flag/status 238 * @param[in] sc The base address of smartcard module 239 * @param[in] u32Mask Receive error flag/status to clear, combination following values 240 * - \ref SC_STATUS_PEF_Msk 241 * - \ref SC_STATUS_FEF_Msk 242 * - \ref SC_STATUS_BEF_Msk 243 * @return None 244 * \hideinitializer 245 */ 246 #define SCUART_CLR_ERR_FLAG(sc, u32Mask) ((sc)->STATUS = (u32Mask)) 247 248 void SCUART_Close(SC_T* sc); 249 uint32_t SCUART_Open(SC_T* sc, uint32_t u32baudrate); 250 uint32_t SCUART_Read(SC_T* sc, uint8_t pu8RxBuf[], uint32_t u32ReadBytes); 251 uint32_t SCUART_SetLineConfig(SC_T* sc, uint32_t u32Baudrate, uint32_t u32DataWidth, uint32_t u32Parity, uint32_t u32StopBits); 252 void SCUART_SetTimeoutCnt(SC_T* sc, uint32_t u32TOC); 253 void SCUART_Write(SC_T* sc,uint8_t pu8TxBuf[], uint32_t u32WriteBytes); 254 255 /*@}*/ /* end of group SCUART_EXPORTED_FUNCTIONS */ 256 257 /*@}*/ /* end of group SCUART_Driver */ 258 259 /*@}*/ /* end of group Standard_Driver */ 260 261 #ifdef __cplusplus 262 } 263 #endif 264 265 #endif /* __SCUART_H__ */ 266 267 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/ 268
