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Searched refs:AHBCLK (Results 1 – 4 of 4) sorted by relevance

/hal_nuvoton-3.4.0/m48x/StdDriver/src/
Dclk.c690 u32tmpAddr = (uint32_t)&CLK->AHBCLK; in CLK_EnableModuleClock()
773 u32tmpAddr = (uint32_t)&CLK->AHBCLK; in CLK_DisableModuleClock()
/hal_nuvoton-3.4.0/m48x/Devices/M480/Source/IAR/
Dstartup_M480.s184 LDR R1, [R0,#0x4] ; R1 = 0x40000204 (AHBCLK)
186 STR R1, [R0,#0x4] ; CLK->AHBCLK |= CLK_AHBCLK_SPIMCKEN_Msk;
/hal_nuvoton-3.4.0/m48x/Devices/M480/Source/ARM/
Dstartup_M480.s206 LDR R1, [R0,#0x4] ; R1 = 0x40000204 (AHBCLK)
208 STR R1, [R0,#0x4] ; CLK->AHBCLK |= CLK_AHBCLK_SPIMCKEN_Msk;
/hal_nuvoton-3.4.0/m48x/Devices/M480/Include/
Dclk_reg.h986 …__IO uint32_t AHBCLK; /*!< [0x0004] AHB Devices Clock Enable Control Register … member