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Searched refs:STATUS (Results 1 – 25 of 34) sorted by relevance

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/hal_nuvoton-2.7.6/m48x/StdDriver/inc/
Dscuart.h67 #define SCUART_GET_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXEMPTY_Msk)
77 #define SCUART_GET_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk)
86 #define SCUART_WAIT_TX_EMPTY(sc) while((sc)->STATUS & SC_STATUS_TXACT_Msk)
96 #define SCUART_IS_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk ? 1 : 0)
106 #define SCUART_IS_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXACT_Msk ? 0 : 1)
116 #define SCUART_IS_TX_ACTIVE(sc) (((sc)->STATUS & SC_STATUS_TXACT_Msk)? 1 : 0)
136 #define SCUART_GET_RX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_RXEMPTY_Msk)
147 #define SCUART_GET_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk)
168 #define SCUART_IS_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk ? 1 : 0)
234 #define SCUART_GET_ERR_FLAG(sc) ((sc)->STATUS & (SC_STATUS_PEF_Msk | SC_STATUS_FEF_Msk | SC_STATUS_…
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Dwwdt.h71 #define WWDT_CLEAR_RESET_FLAG() (WWDT->STATUS = WWDT_STATUS_WWDTRF_Msk)
83 #define WWDT_CLEAR_INT_FLAG() (WWDT->STATUS = WWDT_STATUS_WWDTIF_Msk)
96 #define WWDT_GET_RESET_FLAG() ((WWDT->STATUS & WWDT_STATUS_WWDTRF_Msk)? 1 : 0)
109 #define WWDT_GET_INT_FLAG() ((WWDT->STATUS & WWDT_STATUS_WWDTIF_Msk)? 1 : 0)
Ddac.h194 #define DAC_IS_BUSY(dac, u32Ch) (((dac)->STATUS & DAC_STATUS_BUSY_Msk) >> DAC_STATUS_BUSY_Pos)
205 #define DAC_GET_INT_FLAG(dac, u32Ch) ((dac)->STATUS & DAC_STATUS_FINISH_Msk)
215 #define DAC_GET_DMAUDR_FLAG(dac) (((dac)->STATUS & DAC_STATUS_DMAUDR_Msk) >> DAC_STATUS_DMAUDR_Pos)
225 #define DAC_CLR_INT_FLAG(dac, u32Ch) ((dac)->STATUS = DAC_STATUS_FINISH_Msk)
234 #define DAC_CLR_DMAUDR_FLAG(dac) ((dac)->STATUS = DAC_STATUS_DMAUDR_Msk)
Dqspi.h78 #define QSPI_CLR_UNIT_TRANS_INT_FLAG(qspi) ((qspi)->STATUS = QSPI_STATUS_UNITIF_Msk)
123 #define QSPI_GET_RX_FIFO_COUNT(qspi) (((qspi)->STATUS & QSPI_STATUS_RXCNT_Msk) >> QSPI_STATUS_RXC…
133 #define QSPI_GET_RX_FIFO_EMPTY_FLAG(qspi) (((qspi)->STATUS & QSPI_STATUS_RXEMPTY_Msk)>>QSPI_STATU…
143 #define QSPI_GET_TX_FIFO_EMPTY_FLAG(qspi) (((qspi)->STATUS & QSPI_STATUS_TXEMPTY_Msk)>>QSPI_STATU…
153 #define QSPI_GET_TX_FIFO_FULL_FLAG(qspi) (((qspi)->STATUS & QSPI_STATUS_TXFULL_Msk)>>QSPI_STATUS_…
257 #define QSPI_IS_BUSY(qspi) ( ((qspi)->STATUS & QSPI_STATUS_BUSY_Msk)>>QSPI_STATUS_BUSY_Pos )
Dopa.h113 #define OPA_GET_DIGITAL_OUTPUT(opa, u32OpaNum) (((opa)->STATUS & (OPA_STATUS_OPDO0_Msk<<(u32OpaNum)…
124 #define OPA_GET_INT_FLAG(opa, u32OpaNum) (((opa)->STATUS & (OPA_STATUS_OPDOIF0_Msk<<(u32OpaNum)))?1…
134 #define OPA_CLR_INT_FLAG(opa, u32OpaNum) ((opa)->STATUS = (OPA_STATUS_OPDOIF0_Msk<<(u32OpaNum)))
Dspi.h127 #define SPI_CLR_UNIT_TRANS_INT_FLAG(spi) ((spi)->STATUS = SPI_STATUS_UNITIF_Msk)
172 #define SPI_GET_RX_FIFO_COUNT(spi) (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Po…
182 #define SPI_GET_RX_FIFO_EMPTY_FLAG(spi) (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXE…
192 #define SPI_GET_TX_FIFO_EMPTY_FLAG(spi) (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXE…
202 #define SPI_GET_TX_FIFO_FULL_FLAG(spi) (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFUL…
306 #define SPI_IS_BUSY(spi) ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos )
Dacmp.h198 #define ACMP_GET_OUTPUT(acmp, u32ChNum) (((acmp)->STATUS & (ACMP_STATUS_ACMPO0_Msk<<((u32ChNum))))?…
208 #define ACMP_GET_INT_FLAG(acmp, u32ChNum) (((acmp)->STATUS & (ACMP_STATUS_ACMPIF0_Msk<<((u32ChNum))…
218 #define ACMP_CLR_INT_FLAG(acmp, u32ChNum) ((acmp)->STATUS = (ACMP_STATUS_ACMPIF0_Msk<<((u32ChNum))))
228 #define ACMP_CLR_WAKEUP_INT_FLAG(acmp, u32ChNum) ((acmp)->STATUS = (ACMP_STATUS_WKIF0_Msk<<((u32ChN…
Dqei.h234 #define QEI_GET_DIR(qei) (((qei)->STATUS & (QEI_STATUS_DIRF_Msk))?1:0)
278 #define QEI_GET_INT_FLAG(qei, u32IntSel) (((qei)->STATUS & (u32IntSel))?1:0)
293 #define QEI_CLR_INT_FLAG(qei, u32IntSel) ((qei)->STATUS = (u32IntSel))
Decap.h368 #define ECAP_GET_INT_STATUS(ecap) ((ecap)->STATUS)
383 #define ECAP_GET_CAPTURE_FLAG(ecap, u32Mask) (((ecap)->STATUS & (u32Mask))?1:0)
398 #define ECAP_CLR_CAPTURE_FLAG(ecap, u32Mask) ((ecap)->STATUS = (u32Mask))
Dotg.h250 #define OTG_GET_STATUS(u32Mask) (OTG->STATUS & (u32Mask))
Dhsotg.h250 #define HSOTG_GET_STATUS(u32Mask) (HSOTG->STATUS & (u32Mask))
/hal_nuvoton-2.7.6/m48x/StdDriver/src/
Dqspi.c633 u32TmpVal = qspi->STATUS & QSPI_STATUS_UNITIF_Msk; in QSPI_GetIntFlag()
640 u32TmpVal = qspi->STATUS & QSPI_STATUS_SSACTIF_Msk; in QSPI_GetIntFlag()
647 u32TmpVal = qspi->STATUS & QSPI_STATUS_SSINAIF_Msk; in QSPI_GetIntFlag()
654 u32TmpVal = qspi->STATUS & QSPI_STATUS_SLVURIF_Msk; in QSPI_GetIntFlag()
661 u32TmpVal = qspi->STATUS & QSPI_STATUS_SLVBEIF_Msk; in QSPI_GetIntFlag()
668 u32TmpVal = qspi->STATUS & QSPI_STATUS_TXUFIF_Msk; in QSPI_GetIntFlag()
675 u32TmpVal = qspi->STATUS & QSPI_STATUS_TXTHIF_Msk; in QSPI_GetIntFlag()
682 u32TmpVal = qspi->STATUS & QSPI_STATUS_RXTHIF_Msk; in QSPI_GetIntFlag()
689 u32TmpVal = qspi->STATUS & QSPI_STATUS_RXOVIF_Msk; in QSPI_GetIntFlag()
696 u32TmpVal = qspi->STATUS & QSPI_STATUS_RXTOIF_Msk; in QSPI_GetIntFlag()
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Dspi.c797 u32TmpVal = spi->STATUS & SPI_STATUS_UNITIF_Msk; in SPI_GetIntFlag()
804 u32TmpVal = spi->STATUS & SPI_STATUS_SSACTIF_Msk; in SPI_GetIntFlag()
811 u32TmpVal = spi->STATUS & SPI_STATUS_SSINAIF_Msk; in SPI_GetIntFlag()
818 u32TmpVal = spi->STATUS & SPI_STATUS_SLVURIF_Msk; in SPI_GetIntFlag()
825 u32TmpVal = spi->STATUS & SPI_STATUS_SLVBEIF_Msk; in SPI_GetIntFlag()
832 u32TmpVal = spi->STATUS & SPI_STATUS_TXUFIF_Msk; in SPI_GetIntFlag()
839 u32TmpVal = spi->STATUS & SPI_STATUS_TXTHIF_Msk; in SPI_GetIntFlag()
846 u32TmpVal = spi->STATUS & SPI_STATUS_RXTHIF_Msk; in SPI_GetIntFlag()
853 u32TmpVal = spi->STATUS & SPI_STATUS_RXOVIF_Msk; in SPI_GetIntFlag()
860 u32TmpVal = spi->STATUS & SPI_STATUS_RXTOIF_Msk; in SPI_GetIntFlag()
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Dbpwm.c316 (bpwm)->STATUS = (BPWM_STATUS_EADCTRGn_Msk << u32ChannelNum); in BPWM_ClearADCTriggerFlag()
331 return (((bpwm)->STATUS & (BPWM_STATUS_EADCTRGn_Msk << u32ChannelNum)) ? 1UL : 0UL); in BPWM_GetADCTriggerFlag()
720 return (((bpwm)->STATUS & BPWM_STATUS_CNTMAX0_Msk) ? 1UL : 0UL); in BPWM_GetWrapAroundFlag()
735 (bpwm)->STATUS = BPWM_STATUS_CNTMAX0_Msk; in BPWM_ClearWrapAroundFlag()
Depwm.c327 (epwm)->STATUS = (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum); in EPWM_ClearADCTriggerFlag()
342 return (((epwm)->STATUS & (EPWM_STATUS_EADCTRGF0_Msk << u32ChannelNum))?1UL:0UL); in EPWM_GetADCTriggerFlag()
391 (epwm)->STATUS = EPWM_STATUS_DACTRGF_Msk; in EPWM_ClearDACTriggerFlag()
406 return (((epwm)->STATUS & EPWM_STATUS_DACTRGF_Msk)?1UL:0UL); in EPWM_GetDACTriggerFlag()
1443 return (((epwm)->STATUS & (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum)) ? 1UL : 0UL); in EPWM_GetWrapAroundFlag()
1457 (epwm)->STATUS = (EPWM_STATUS_CNTMAXF0_Msk << u32ChannelNum); in EPWM_ClearWrapAroundFlag()
Dcan.c279 tCAN->STATUS = 0x0ul; /* clr status */ in CAN_WaitMsg()
292 if(tCAN->STATUS & CAN_STATUS_RXOK_Msk) in CAN_WaitMsg()
300 if(tCAN->STATUS & CAN_STATUS_LEC_Msk) in CAN_WaitMsg()
394 tCAN->STATUS &= (~CAN_STATUS_TXOK_Msk); in CAN_BasicSendMsg()
482 tCAN->STATUS &= (~CAN_STATUS_RXOK_Msk); in CAN_BasicReceiveMsg()
689 tCAN->STATUS &= (~CAN_STATUS_RXOK_Msk); in CAN_ReadMsgObj()
1001 tCAN->STATUS &= (~CAN_STATUS_TXOK_Msk); in CAN_TriggerTxMsg()
Dclk.c276 u32HIRCSTB = CLK->STATUS & CLK_STATUS_HIRCSTB_Msk; in CLK_SetCoreClock()
301 u32HIRCSTB = CLK->STATUS & CLK_STATUS_HIRCSTB_Msk; in CLK_SetCoreClock()
338 u32HIRCSTB = CLK->STATUS & CLK_STATUS_HIRCSTB_Msk; in CLK_SetHCLK()
966 while((CLK->STATUS & u32ClkMask) != u32ClkMask) in CLK_WaitClockReady()
/hal_nuvoton-2.7.6/m48x/Devices/M480/Include/
Dwwdt_reg.h104 …__IO uint32_t STATUS; /*!< [0x0008] WWDT Status Register … member
Ddac_reg.h138 …__IO uint32_t STATUS; /*!< [0x0010] DAC Status Register … member
Dacmp_reg.h150 …__IO uint32_t STATUS; /*!< [0x0008] Analog Comparator Status Register … member
Dopa_reg.h149 …__IO uint32_t STATUS; /*!< [0x0004] OP Amplifier Status Register … member
Dqei_reg.h202 …__IO uint32_t STATUS; /*!< [0x002c] QEI Controller Status Register … member
Dotg_reg.h252 …__I uint32_t STATUS; /*!< [0x0010] OTG Status Register … member
Dhsotg_reg.h252 …__I uint32_t STATUS; /*!< [0x0010] HSOTG Status Register … member
Decap_reg.h247 …__IO uint32_t STATUS; /*!< [0x001c] Input Capture Status Register … member

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