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Searched refs:INTEN (Results 1 – 25 of 36) sorted by relevance

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/hal_nuvoton-2.7.6/m48x/StdDriver/inc/
Dcrypto.h138 #define PRNG_ENABLE_INT(crpt) ((crpt)->INTEN |= CRPT_INTEN_PRNGIEN_Msk)
146 #define PRNG_DISABLE_INT(crpt) ((crpt)->INTEN &= ~CRPT_INTEN_PRNGIEN_Msk)
170 #define AES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Msk…
178 #define AES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_AESIEN_Msk|CRPT_INTEN_AESEIEN_Ms…
219 #define TDES_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_TDESIEN_Msk|CRPT_INTEN_TDESEIEN_M…
227 #define TDES_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_TDESIEN_Msk|CRPT_INTEN_TDESEIEN_…
268 #define SHA_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_M…
276 #define SHA_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_HMACIEN_Msk|CRPT_INTEN_HMACEIEN_…
300 #define ECC_ENABLE_INT(crpt) ((crpt)->INTEN |= (CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Msk…
308 #define ECC_DISABLE_INT(crpt) ((crpt)->INTEN &= ~(CRPT_INTEN_ECCIEN_Msk|CRPT_INTEN_ECCEIEN_Ms…
Duart.h325 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
348 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
461 #define UART_PDMA_ENABLE(uart, u32FuncSel) ((uart)->INTEN |= (u32FuncSel))
474 #define UART_PDMA_DISABLE(uart, u32FuncSel) ((uart)->INTEN &= ~(u32FuncSel))
Dotg.h169 #define OTG_ENABLE_INT(u32Mask) (OTG->INTEN |= (u32Mask))
191 #define OTG_DISABLE_INT(u32Mask) (OTG->INTEN &= ~(u32Mask))
Dhsotg.h169 #define HSOTG_ENABLE_INT(u32Mask) (HSOTG->INTEN |= (u32Mask))
191 #define HSOTG_DISABLE_INT(u32Mask) (HSOTG->INTEN &= ~(u32Mask))
Dsdh.h109 #define SDH_ENABLE_INT(sdh, u32IntMask) ((sdh)->INTEN |= (u32IntMask))
122 #define SDH_DISABLE_INT(sdh, u32IntMask) ((sdh)->INTEN &= ~(u32IntMask))
Dscuart.h183 #define SCUART_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
196 #define SCUART_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
Demac.h200 #define EMAC_ENABLE_INT(emac, u32eIntSel) ((emac)->INTEN |= (u32eIntSel))
237 #define EMAC_DISABLE_INT(emac, u32eIntSel) ((emac)->INTEN &= ~ (u32eIntSel))
Dsc.h73 #define SC_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
93 #define SC_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
Dusci_uart.h300 #define UUART_ENABLE_TRANS_INT(uuart, u32IntSel) ((uuart)->INTEN |= (u32IntSel))
318 #define UUART_DISABLE_TRANS_INT(uuart, u32IntSel) ((uuart)->INTEN &= ~(u32IntSel))
Dusci_spi.h330 #define USPI_ENABLE_TRANS_INT(uspi, u32IntSel) ((uspi)->INTEN |= (u32IntSel))
343 #define USPI_DISABLE_TRANS_INT(uspi, u32IntSel) ((uspi)->INTEN &= ~ (u32IntSel))
/hal_nuvoton-2.7.6/m48x/StdDriver/src/
Dgpio.c70 port->INTEN = (port->INTEN&~(0x00010001ul<<u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt()
90 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
Dusci_spi.c276 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk; in USPI_EnableInt()
282 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk; in USPI_EnableInt()
288 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk; in USPI_EnableInt()
294 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk; in USPI_EnableInt()
358 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk; in USPI_DisableInt()
364 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk; in USPI_DisableInt()
370 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk; in USPI_DisableInt()
376 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk; in USPI_DisableInt()
Dusci_uart.c229 uuart->INTEN &= ~UUART_INTEN_TXSTIEN_Msk; in UUART_DisableInt()
235 uuart->INTEN &= ~UUART_INTEN_TXENDIEN_Msk; in UUART_DisableInt()
241 uuart->INTEN &= ~UUART_INTEN_RXSTIEN_Msk; in UUART_DisableInt()
247 uuart->INTEN &= ~UUART_INTEN_RXENDIEN_Msk; in UUART_DisableInt()
294 uuart->INTEN |= UUART_INTEN_TXSTIEN_Msk; in UUART_EnableInt()
300 uuart->INTEN |= UUART_INTEN_TXENDIEN_Msk; in UUART_EnableInt()
306 uuart->INTEN |= UUART_INTEN_RXSTIEN_Msk; in UUART_EnableInt()
312 uuart->INTEN |= UUART_INTEN_RXENDIEN_Msk; in UUART_EnableInt()
Dbpwm.c478 (bpwm)->INTEN |= (u32IntDutyType << u32ChannelNum); in BPWM_EnableDutyInt()
493 …(bpwm)->INTEN &= ~((uint32_t)(BPWM_DUTY_INT_DOWN_COUNT_MATCH_CMP | BPWM_DUTY_INT_UP_COUNT_MATCH_CM… in BPWM_DisableDutyInt()
539 (bpwm)->INTEN |= BPWM_INTEN_PIEN0_Msk; in BPWM_EnablePeriodInt()
554 (bpwm)->INTEN &= ~BPWM_INTEN_PIEN0_Msk; in BPWM_DisablePeriodInt()
601 (bpwm)->INTEN |= BPWM_INTEN_ZIEN0_Msk; in BPWM_EnableZeroInt()
616 (bpwm)->INTEN &= ~BPWM_INTEN_ZIEN0_Msk; in BPWM_DisableZeroInt()
Dsc.c87 sc->INTEN = 0UL; in SC_Close()
197 sc->INTEN = (SC_INTEN_RDAIEN_Msk | in SC_ResetReader()
207 sc->INTEN = (SC_INTEN_RDAIEN_Msk | in SC_ResetReader()
Duart.c91 uart->INTEN = 0ul; in UART_Close()
106 uart->INTEN &= ~(UART_INTEN_ATORTSEN_Msk | UART_INTEN_ATOCTSEN_Msk); in UART_DisableFlowCtrl()
153 uart->INTEN |= UART_INTEN_ATORTSEN_Msk | UART_INTEN_ATOCTSEN_Msk; in UART_EnableFlowCtrl()
443 uart->INTEN |= UART_INTEN_TOCNTEN_Msk; in UART_SetTimeoutCnt()
Dsdh.c408 if ((sdh->INTEN & SDH_INTEN_CDSRC_Msk) == SDH_INTEN_CDSRC_Msk) /* Card detect pin from GPIO */ in SDH_CardDetection()
420 else if ((sdh->INTEN & SDH_INTEN_CDSRC_Msk) != SDH_INTEN_CDSRC_Msk) in SDH_CardDetection()
777 sdh->INTEN |= SDH_INTEN_BLKDIEN_Msk; in SDH_SelectCardType()
907 sdh->INTEN &= ~SDH_INTEN_CDSRC_Msk; in SDH_Open()
911 sdh->INTEN |= SDH_INTEN_CDSRC_Msk; in SDH_Open()
913 sdh->INTEN |= SDH_INTEN_CDIEN_Msk; in SDH_Open()
Dpdma.c434 pdma->INTEN |= (1ul << u32Ch); in PDMA_EnableInt()
467 pdma->INTEN &= ~(1ul << u32Ch); in PDMA_DisableInt()
Dscuart.c33 sc->INTEN = 0UL; in SCUART_Close()
/hal_nuvoton-2.7.6/m48x/Devices/M480/Include/
Dotg_reg.h250 …__IO uint32_t INTEN; /*!< [0x0008] OTG Interrupt Enable Register … member
Dhsotg_reg.h250 …__IO uint32_t INTEN; /*!< [0x0008] HSOTG Interrupt Enable Register … member
Dsdh_reg.h364 …__IO uint32_t INTEN; /*!< [0x0828] SD Interrupt Control Register … member
Dusbd_reg.h409 …__IO uint32_t INTEN; /*!< [0x0000] USB Device Interrupt Enable Register … member
Duspi_reg.h429 …__IO uint32_t INTEN; /*!< [0x0004] USCI Interrupt Enable Register … member
Duuart_reg.h425 …__IO uint32_t INTEN; /*!< [0x0004] USCI Interrupt Enable Register … member

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