1 /*
2 * Copyright (c) 2021 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRFY_PDM_H__
35 #define NRFY_PDM_H__
36
37 #include <nrfx.h>
38 #include <hal/nrf_pdm.h>
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 typedef struct nrfy_pdm_buffer_t nrfy_pdm_buffer_t;
45
46 NRFY_STATIC_INLINE bool __nrfy_internal_pdm_event_handle(NRF_PDM_Type * p_reg,
47 uint32_t mask,
48 nrf_pdm_event_t event,
49 uint32_t * p_event_mask);
50
51 NRFY_STATIC_INLINE uint32_t __nrfy_internal_pdm_events_process(NRF_PDM_Type * p_reg,
52 uint32_t mask,
53 nrfy_pdm_buffer_t const * p_buffer);
54
55 NRFY_STATIC_INLINE void __nrfy_internal_pdm_event_enabled_clear(NRF_PDM_Type * p_reg,
56 uint32_t mask,
57 nrf_pdm_event_t event);
58
59 /**
60 * @defgroup nrfy_pdm PDM HALY
61 * @{
62 * @ingroup nrf_pdm
63 * @brief Hardware access layer with cache and barrier support for managing the PDM peripheral.
64 */
65
66 /** @brief Structure describing reception buffer.*/
67 struct nrfy_pdm_buffer_t
68 {
69 int16_t * p_buff; ///< Pointer to the data buffer.
70 uint16_t length; ///< Data buffer lenght.
71 };
72
73 /** @brief PDM pins configuration structure. */
74 typedef struct
75 {
76 uint32_t clk_pin; ///< CLK pin number.
77 uint32_t din_pin; ///< DIN pin number.
78 } nrfy_pdm_pins_t;
79
80 /** @brief PDM configuration structure. */
81 typedef struct
82 {
83 nrf_pdm_mode_t mode; ///< Interface operation mode.
84 nrf_pdm_edge_t edge; ///< Sampling mode.
85 nrfy_pdm_pins_t pins; ///< Pin configuration structure.
86 #if NRF_PDM_HAS_PDMCLKCTRL
87 nrf_pdm_freq_t clock_freq; ///< Clock frequency.
88 #elif NRF_PDM_HAS_PRESCALER
89 uint32_t prescaler; ///< Prescaler divisior.
90 #endif
91 nrf_pdm_gain_t gain_l; ///< Left channel gain.
92 nrf_pdm_gain_t gain_r; ///< Right channel gain.
93 #if NRF_PDM_HAS_RATIO_CONFIG
94 nrf_pdm_ratio_t ratio; ///< Ratio between PDM_CLK and output sample rate.
95 #endif
96 #if NRF_PDM_HAS_MCLKCONFIG
97 nrf_pdm_mclksrc_t mclksrc; ///< Master clock source selection.
98 #endif
99 bool skip_psel_cfg; ///< Skip pin selection configuration.
100 /**< When set to true, the driver does not modify
101 * pin select registers in the peripheral.
102 * Those registers are supposed to be set up
103 * externally before the driver is initialized.
104 * @note When both GPIO configuration and pin
105 * selection are to be skipped, the structure
106 * fields that specify pins can be omitted,
107 * as they are ignored anyway. */
108 } nrfy_pdm_config_t;
109
110 /**
111 * @brief Function for configuring the PDM.
112 *
113 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
114 * @param[in] p_config Pointer to the peripheral configuration structure.
115 */
nrfy_pdm_periph_configure(NRF_PDM_Type * p_reg,nrfy_pdm_config_t const * p_config)116 NRFY_STATIC_INLINE void nrfy_pdm_periph_configure(NRF_PDM_Type * p_reg,
117 nrfy_pdm_config_t const * p_config)
118 {
119 #if NRF_PDM_HAS_RATIO_CONFIG
120 nrf_pdm_ratio_set(p_reg, p_config->ratio);
121 #endif
122
123 #if NRF_PDM_HAS_MCLKCONFIG
124 nrf_pdm_mclksrc_configure(p_reg, p_config->mclksrc);
125 #endif
126 #if NRF_PDM_HAS_PDMCLKCTRL
127 nrf_pdm_clock_set(p_reg, p_config->clock_freq);
128 #elif NRF_PDM_HAS_PRESCALER
129 nrf_pdm_prescaler_set(p_reg, p_config->prescaler);
130 #endif
131 nrf_pdm_mode_set(p_reg, p_config->mode, p_config->edge);
132 nrf_pdm_gain_set(p_reg, p_config->gain_l, p_config->gain_r);
133 if (!p_config->skip_psel_cfg)
134 {
135 nrf_pdm_psel_connect(p_reg, p_config->pins.clk_pin, p_config->pins.din_pin);
136 }
137 nrf_barrier_w();
138 }
139
140 /**
141 * @brief Function for initializing the specified PDM interrupts.
142 *
143 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
144 * @param[in] mask Mask of interrupts to be initialized.
145 * @param[in] irq_priority Interrupt priority.
146 * @param[in] enable True if the interrupts are to be enabled, false otherwise.
147 */
nrfy_pdm_int_init(NRF_PDM_Type * p_reg,uint32_t mask,uint8_t irq_priority,bool enable)148 NRFY_STATIC_INLINE void nrfy_pdm_int_init(NRF_PDM_Type * p_reg,
149 uint32_t mask,
150 uint8_t irq_priority,
151 bool enable)
152 {
153 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_STARTED);
154 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_END);
155 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_STOPPED);
156 nrf_barrier_w();
157
158 NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_reg), irq_priority);
159 NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_reg));
160 if (enable)
161 {
162 nrf_pdm_int_enable(p_reg, mask);
163 }
164
165 nrf_barrier_w();
166 }
167
168 /**
169 * @brief Function for uninitializing the PDM interrupts.
170 *
171 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
172 */
nrfy_pdm_int_uninit(NRF_PDM_Type * p_reg)173 NRFY_STATIC_INLINE void nrfy_pdm_int_uninit(NRF_PDM_Type * p_reg)
174 {
175 NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_reg));
176 nrf_barrier_w();
177 }
178
179 /**
180 * @brief Function for processing the specified PDM events.
181 *
182 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
183 * @param[in] mask Mask of events to be processed, created by @ref NRFY_EVENT_TO_INT_BITMASK().
184 * @param[in] p_buffer Pointer to the structure containing buffer associated with the last reception. Can be NULL.
185 *
186 * @return Mask of events that were generated and processed.
187 * To be checked against the result of @ref NRFY_EVENT_TO_INT_BITMASK().
188 */
nrfy_pdm_events_process(NRF_PDM_Type * p_reg,uint32_t mask,nrfy_pdm_buffer_t * p_buffer)189 NRFY_STATIC_INLINE uint32_t nrfy_pdm_events_process(NRF_PDM_Type * p_reg,
190 uint32_t mask,
191 nrfy_pdm_buffer_t * p_buffer)
192 {
193 uint32_t evt_mask = __nrfy_internal_pdm_events_process(p_reg, mask, p_buffer);
194 nrf_barrier_w();
195 return evt_mask;
196 }
197
198 /**
199 * @brief Function for setting the PDM sampling buffer.
200 *
201 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
202 * @param[in] p_buffer Pointer to the structure containing reception buffer.
203 */
nrfy_pdm_buffer_set(NRF_PDM_Type * p_reg,nrfy_pdm_buffer_t const * p_buffer)204 NRFY_STATIC_INLINE void nrfy_pdm_buffer_set(NRF_PDM_Type * p_reg,
205 nrfy_pdm_buffer_t const * p_buffer)
206 {
207 nrf_pdm_buffer_set(p_reg, (uint32_t *)(p_buffer->p_buff), p_buffer->length);
208 nrf_barrier_w();
209 }
210
211 /**
212 * @brief Function for starting the PDM sampling.
213 *
214 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
215 * @param[in] p_buffer Pointer to the structure containing reception buffer if the reception
216 * is to be blocking. NULL for non-blocking receptions.
217 */
nrfy_pdm_start(NRF_PDM_Type * p_reg,nrfy_pdm_buffer_t const * p_buffer)218 NRFY_STATIC_INLINE void nrfy_pdm_start(NRF_PDM_Type * p_reg,
219 nrfy_pdm_buffer_t const * p_buffer)
220 {
221 nrf_pdm_task_trigger(p_reg, NRF_PDM_TASK_START);
222 if (p_buffer)
223 {
224 nrf_barrier_w();
225 uint32_t evt_mask = NRFY_EVENT_TO_INT_BITMASK(NRF_PDM_EVENT_END);
226 while (!__nrfy_internal_pdm_events_process(p_reg, evt_mask, p_buffer))
227 {}
228 }
229 nrf_barrier_w();
230 }
231
232 /**
233 * @brief Function for aborting PDM transaction.
234 *
235 * @param[in] p_reg Pointer to thr structure of registers of the peripheral.
236 * @param[in] p_buffer Pointer to the structure containing reception buffer if the reception
237 * is to be blocking. NULL for non-blocking receptions.
238 */
nrfy_pdm_abort(NRF_PDM_Type * p_reg,nrfy_pdm_buffer_t const * p_buffer)239 NRFY_STATIC_INLINE void nrfy_pdm_abort(NRF_PDM_Type * p_reg,
240 nrfy_pdm_buffer_t const * p_buffer)
241 {
242 nrf_pdm_task_trigger(p_reg, NRF_PDM_TASK_STOP);
243 if (p_buffer)
244 {
245 nrf_barrier_w();
246 uint32_t evt_mask = NRFY_EVENT_TO_INT_BITMASK(NRF_PDM_EVENT_STOPPED) |
247 NRFY_EVENT_TO_INT_BITMASK(NRF_PDM_EVENT_END);
248 while (!__nrfy_internal_pdm_events_process(p_reg, evt_mask, p_buffer))
249 {}
250 }
251 nrf_barrier_w();
252 }
253
254 /**
255 * @brief Function for setting the PDM pins configuration.
256 *
257 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
258 * @param[out] p_pins Pointer to the PDM pin configurartion structure.
259 */
nrfy_pdm_pins_set(NRF_PDM_Type * p_reg,nrfy_pdm_pins_t * p_pins)260 NRFY_STATIC_INLINE void nrfy_pdm_pins_set(NRF_PDM_Type * p_reg, nrfy_pdm_pins_t * p_pins)
261 {
262 nrf_pdm_psel_connect(p_reg, p_pins->clk_pin, p_pins->din_pin);
263 nrf_barrier_w();
264 }
265
266 /**
267 * @brief Function for getting the PDM pins configuration.
268 *
269 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
270 * @param[out] p_pins Pointer to the structure to be filled with PDM pins configuration.
271 */
nrfy_pdm_pins_get(NRF_PDM_Type const * p_reg,nrfy_pdm_pins_t * p_pins)272 NRFY_STATIC_INLINE void nrfy_pdm_pins_get(NRF_PDM_Type const * p_reg, nrfy_pdm_pins_t * p_pins)
273 {
274 nrf_barrier_rw();
275 p_pins->clk_pin = nrf_pdm_clk_pin_get(p_reg);
276 p_pins->din_pin = nrf_pdm_din_pin_get(p_reg);
277 nrf_barrier_r();
278 }
279
280 /** @refhal{nrf_pdm_task_trigger} */
nrfy_pdm_task_trigger(NRF_PDM_Type * p_reg,nrf_pdm_task_t task)281 NRFY_STATIC_INLINE void nrfy_pdm_task_trigger(NRF_PDM_Type * p_reg,
282 nrf_pdm_task_t task)
283 {
284 nrf_pdm_task_trigger(p_reg, task);
285 nrf_barrier_w();
286 }
287
288 /** @refhal{nrf_pdm_task_address_get} */
nrfy_pdm_task_address_get(NRF_PDM_Type const * p_reg,nrf_pdm_task_t task)289 NRFY_STATIC_INLINE uint32_t nrfy_pdm_task_address_get(NRF_PDM_Type const * p_reg,
290 nrf_pdm_task_t task)
291 {
292 return nrf_pdm_task_address_get(p_reg, task);
293 }
294
295 /** @refhal{nrf_pdm_event_check} */
nrfy_pdm_event_check(NRF_PDM_Type const * p_reg,nrf_pdm_event_t event)296 NRFY_STATIC_INLINE bool nrfy_pdm_event_check(NRF_PDM_Type const * p_reg,
297 nrf_pdm_event_t event)
298 {
299 nrf_barrier_r();
300 bool check = nrf_pdm_event_check(p_reg, event);
301 nrf_barrier_r();
302 return check;
303 }
304
305 /** @refhal{nrf_pdm_event_clear} */
nrfy_pdm_event_clear(NRF_PDM_Type * p_reg,nrf_pdm_event_t event)306 NRFY_STATIC_INLINE void nrfy_pdm_event_clear(NRF_PDM_Type * p_reg,
307 nrf_pdm_event_t event)
308 {
309 nrf_pdm_event_clear(p_reg, event);
310 nrf_barrier_w();
311 }
312
313 /** @refhal{nrf_pdm_event_address_get} */
nrfy_pdm_event_address_get(NRF_PDM_Type const * p_reg,nrf_pdm_event_t event)314 NRFY_STATIC_INLINE uint32_t nrfy_pdm_event_address_get(NRF_PDM_Type const * p_reg,
315 nrf_pdm_event_t event)
316 {
317 return nrf_pdm_event_address_get(p_reg, event);
318 }
319
320 /** @refhal{nrf_pdm_int_enable} */
nrfy_pdm_int_enable(NRF_PDM_Type * p_reg,uint32_t mask)321 NRFY_STATIC_INLINE void nrfy_pdm_int_enable(NRF_PDM_Type * p_reg,
322 uint32_t mask)
323 {
324 nrf_pdm_int_enable(p_reg, mask);
325 nrf_barrier_w();
326 }
327
328 /** @refhal{nrf_pdm_int_enable_check} */
nrfy_pdm_int_enable_check(NRF_PDM_Type const * p_reg,uint32_t mask)329 NRFY_STATIC_INLINE uint32_t nrfy_pdm_int_enable_check(NRF_PDM_Type const * p_reg,
330 uint32_t mask)
331 {
332 nrf_barrier_rw();
333 uint32_t check = nrf_pdm_int_enable_check(p_reg, mask);
334 nrf_barrier_r();
335 return check;
336 }
337
338 /** @refhal{nrf_pdm_int_disable} */
nrfy_pdm_int_disable(NRF_PDM_Type * p_reg,uint32_t mask)339 NRFY_STATIC_INLINE void nrfy_pdm_int_disable(NRF_PDM_Type * p_reg,
340 uint32_t mask)
341 {
342 nrf_pdm_int_disable(p_reg, mask);
343 nrf_barrier_w();
344 }
345
346 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
347 /** @refhal{nrf_pdm_subscribe_set} */
nrfy_pdm_subscribe_set(NRF_PDM_Type * p_reg,nrf_pdm_task_t task,uint8_t channel)348 NRFY_STATIC_INLINE void nrfy_pdm_subscribe_set(NRF_PDM_Type * p_reg,
349 nrf_pdm_task_t task,
350 uint8_t channel)
351 {
352 nrf_pdm_subscribe_set(p_reg, task, channel);
353 nrf_barrier_w();
354 }
355
356 /** @refhal{nrf_pdm_subscribe_clear} */
nrfy_pdm_subscribe_clear(NRF_PDM_Type * p_reg,nrf_pdm_task_t task)357 NRFY_STATIC_INLINE void nrfy_pdm_subscribe_clear(NRF_PDM_Type * p_reg,
358 nrf_pdm_task_t task)
359 {
360 nrf_pdm_subscribe_clear(p_reg, task);
361 nrf_barrier_w();
362 }
363
364 /** @refhal{nrf_pdm_publish_set} */
nrfy_pdm_publish_set(NRF_PDM_Type * p_reg,nrf_pdm_event_t event,uint8_t channel)365 NRFY_STATIC_INLINE void nrfy_pdm_publish_set(NRF_PDM_Type * p_reg,
366 nrf_pdm_event_t event,
367 uint8_t channel)
368 {
369 nrf_pdm_publish_set(p_reg, event, channel);
370 nrf_barrier_w();
371 }
372
373 /** @refhal{nrf_pdm_publish_clear} */
nrfy_pdm_publish_clear(NRF_PDM_Type * p_reg,nrf_pdm_event_t event)374 NRFY_STATIC_INLINE void nrfy_pdm_publish_clear(NRF_PDM_Type * p_reg,
375 nrf_pdm_event_t event)
376 {
377 nrf_pdm_publish_clear(p_reg, event);
378 nrf_barrier_w();
379 }
380 #endif
381
382 /** @refhal{nrf_pdm_enable} */
nrfy_pdm_enable(NRF_PDM_Type * p_reg)383 NRFY_STATIC_INLINE void nrfy_pdm_enable(NRF_PDM_Type * p_reg)
384 {
385 nrf_pdm_enable(p_reg);
386 nrf_barrier_w();
387 }
388
389 /** @refhal{nrf_pdm_disable} */
nrfy_pdm_disable(NRF_PDM_Type * p_reg)390 NRFY_STATIC_INLINE void nrfy_pdm_disable(NRF_PDM_Type * p_reg)
391 {
392 nrf_pdm_disable(p_reg);
393 nrf_barrier_w();
394 }
395
396 /** @refhal{nrf_pdm_enable_check} */
nrfy_pdm_enable_check(NRF_PDM_Type const * p_reg)397 NRFY_STATIC_INLINE bool nrfy_pdm_enable_check(NRF_PDM_Type const * p_reg)
398 {
399 nrf_barrier_rw();
400 bool check = nrf_pdm_enable_check(p_reg);
401 nrf_barrier_r();
402 return check;
403 }
404
405 /** @refhal{nrf_pdm_mode_set} */
nrfy_pdm_mode_set(NRF_PDM_Type * p_reg,nrf_pdm_mode_t pdm_mode,nrf_pdm_edge_t pdm_edge)406 NRFY_STATIC_INLINE void nrfy_pdm_mode_set(NRF_PDM_Type * p_reg,
407 nrf_pdm_mode_t pdm_mode,
408 nrf_pdm_edge_t pdm_edge)
409 {
410 nrf_pdm_mode_set(p_reg, pdm_mode, pdm_edge);
411 nrf_barrier_w();
412 }
413
414 /** @refhal{nrf_pdm_mode_get} */
nrfy_pdm_mode_get(NRF_PDM_Type const * p_reg,nrf_pdm_mode_t * p_pdm_mode,nrf_pdm_edge_t * p_pdm_edge)415 NRFY_STATIC_INLINE void nrfy_pdm_mode_get(NRF_PDM_Type const * p_reg,
416 nrf_pdm_mode_t * p_pdm_mode,
417 nrf_pdm_edge_t * p_pdm_edge)
418 {
419 nrf_barrier_rw();
420 nrf_pdm_mode_get(p_reg, p_pdm_mode, p_pdm_edge);
421 nrf_barrier_r();
422 }
423
424 #if NRF_PDM_HAS_PDMCLKCTRL
425 /** @refhal{nrf_pdm_clock_set} */
nrfy_pdm_clock_set(NRF_PDM_Type * p_reg,nrf_pdm_freq_t pdm_freq)426 NRFY_STATIC_INLINE void nrfy_pdm_clock_set(NRF_PDM_Type * p_reg,
427 nrf_pdm_freq_t pdm_freq)
428 {
429 nrf_pdm_clock_set(p_reg, pdm_freq);
430 nrf_barrier_w();
431 }
432
433 /** @refhal{nrf_pdm_clock_get} */
nrfy_pdm_clock_get(NRF_PDM_Type const * p_reg)434 NRFY_STATIC_INLINE nrf_pdm_freq_t nrfy_pdm_clock_get(NRF_PDM_Type const * p_reg)
435 {
436 nrf_barrier_rw();
437 nrf_pdm_freq_t clock = nrf_pdm_clock_get(p_reg);
438 nrf_barrier_r();
439 return clock;
440 }
441 #endif
442
443 #if NRF_PDM_HAS_PRESCALER
444 /** @refhal{nrf_pdm_prescaler_set} */
nrfy_pdm_prescaler_set(NRF_PDM_Type * p_reg,uint32_t prescaler)445 NRFY_STATIC_INLINE void nrfy_pdm_prescaler_set(NRF_PDM_Type * p_reg, uint32_t prescaler)
446 {
447 nrf_pdm_prescaler_set(p_reg, prescaler);
448 nrf_barrier_w();
449 }
450
451 /** @refhal{nrf_pdm_prescaler_get} */
nrfy_pdm_prescaler_get(NRF_PDM_Type const * p_reg)452 NRFY_STATIC_INLINE uint32_t nrfy_pdm_prescaler_get(NRF_PDM_Type const * p_reg)
453 {
454 nrf_barrier_rw();
455 uint32_t prescaler = nrf_pdm_prescaler_get(p_reg);
456 nrf_barrier_r();
457 return prescaler;
458 }
459 #endif
460
461 /** @refhal{nrf_pdm_psel_disconnect} */
nrfy_pdm_pin_disconnect(NRF_PDM_Type * p_reg)462 NRFY_STATIC_INLINE void nrfy_pdm_pin_disconnect(NRF_PDM_Type * p_reg)
463 {
464 nrf_pdm_psel_disconnect(p_reg);
465 nrf_barrier_w();
466 }
467
468 /** @refhal{nrf_pdm_gain_set} */
nrfy_pdm_gain_set(NRF_PDM_Type * p_reg,nrf_pdm_gain_t gain_l,nrf_pdm_gain_t gain_r)469 NRFY_STATIC_INLINE void nrfy_pdm_gain_set(NRF_PDM_Type * p_reg,
470 nrf_pdm_gain_t gain_l,
471 nrf_pdm_gain_t gain_r)
472 {
473 nrf_pdm_gain_set(p_reg, gain_l, gain_r);
474 nrf_barrier_w();
475 }
476
477 /** @refhal{nrf_pdm_gain_get} */
nrfy_pdm_gain_get(NRF_PDM_Type const * p_reg,nrf_pdm_gain_t * p_gain_l,nrf_pdm_gain_t * p_gain_r)478 NRFY_STATIC_INLINE void nrfy_pdm_gain_get(NRF_PDM_Type const * p_reg,
479 nrf_pdm_gain_t * p_gain_l,
480 nrf_pdm_gain_t * p_gain_r)
481 {
482 nrf_barrier_rw();
483 nrf_pdm_gain_get(p_reg, p_gain_l, p_gain_r);
484 nrf_barrier_r();
485 }
486
487 /** @refhal{nrf_pdm_buffer_get} */
nrfy_pdm_buffer_get(NRF_PDM_Type const * p_reg)488 NRFY_STATIC_INLINE uint32_t * nrfy_pdm_buffer_get(NRF_PDM_Type const * p_reg)
489 {
490 nrf_barrier_rw();
491 uint32_t * p_buffer = nrf_pdm_buffer_get(p_reg);
492 nrf_barrier_r();
493 return p_buffer;
494 }
495
496 #if NRF_PDM_HAS_RATIO_CONFIG
497 /** @refhal{nrf_pdm_ratio_set} */
nrfy_pdm_ratio_set(NRF_PDM_Type * p_reg,nrf_pdm_ratio_t ratio)498 NRFY_STATIC_INLINE void nrfy_pdm_ratio_set(NRF_PDM_Type * p_reg,
499 nrf_pdm_ratio_t ratio)
500 {
501 nrf_pdm_ratio_set(p_reg, ratio);
502 nrf_barrier_w();
503 }
504 #endif
505
506 #if NRF_PDM_HAS_MCLKCONFIG
507 /** @refhal{nrf_pdm_mclksrc_configure} */
nrfy_pdm_mclksrc_configure(NRF_PDM_Type * p_reg,nrf_pdm_mclksrc_t mclksrc)508 NRFY_STATIC_INLINE void nrfy_pdm_mclksrc_configure(NRF_PDM_Type * p_reg,
509 nrf_pdm_mclksrc_t mclksrc)
510 {
511 nrf_pdm_mclksrc_configure(p_reg, mclksrc);
512 nrf_barrier_w();
513 }
514 #endif
515
516 /** @} */
517
__nrfy_internal_pdm_event_handle(NRF_PDM_Type * p_reg,uint32_t mask,nrf_pdm_event_t event,uint32_t * p_event_mask)518 NRFY_STATIC_INLINE bool __nrfy_internal_pdm_event_handle(NRF_PDM_Type * p_reg,
519 uint32_t mask,
520 nrf_pdm_event_t event,
521 uint32_t * p_event_mask)
522 {
523 if ((mask & NRFY_EVENT_TO_INT_BITMASK(event)) && nrf_pdm_event_check(p_reg, event))
524 {
525 nrf_pdm_event_clear(p_reg, event);
526 if (p_event_mask)
527 {
528 *p_event_mask |= NRFY_EVENT_TO_INT_BITMASK(event);
529 }
530 return true;
531 }
532 return false;
533 }
534
__nrfy_internal_pdm_events_process(NRF_PDM_Type * p_reg,uint32_t mask,nrfy_pdm_buffer_t const * p_buffer)535 NRFY_STATIC_INLINE uint32_t __nrfy_internal_pdm_events_process(NRF_PDM_Type * p_reg,
536 uint32_t mask,
537 nrfy_pdm_buffer_t const * p_buffer)
538 {
539 uint32_t evt_mask = 0;
540
541 nrf_barrier_r();
542 (void)__nrfy_internal_pdm_event_handle(p_reg, mask, NRF_PDM_EVENT_STARTED, &evt_mask);
543
544 if (__nrfy_internal_pdm_event_handle(p_reg, mask, NRF_PDM_EVENT_STOPPED, &evt_mask) &&
545 p_buffer->p_buff)
546 {
547 NRFY_CACHE_INV(p_buffer->p_buff, p_buffer->length);
548 }
549
550 (void)__nrfy_internal_pdm_event_handle(p_reg, mask, NRF_PDM_EVENT_END, &evt_mask);
551 return evt_mask;
552 }
553
__nrfy_internal_pdm_event_enabled_clear(NRF_PDM_Type * p_reg,uint32_t mask,nrf_pdm_event_t event)554 NRFY_STATIC_INLINE void __nrfy_internal_pdm_event_enabled_clear(NRF_PDM_Type * p_reg,
555 uint32_t mask,
556 nrf_pdm_event_t event)
557 {
558 if (mask & NRFY_EVENT_TO_INT_BITMASK(event))
559 {
560 nrf_pdm_event_clear(p_reg, event);
561 }
562 }
563
564 #ifdef __cplusplus
565 }
566 #endif
567
568 #endif // NRFY_PDM_H__
569
