1 /*
2 * Copyright (c) 2023 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRFY_BELLBOARD_H__
35 #define NRFY_BELLBOARD_H__
36
37 #include <nrfx.h>
38 #include <hal/nrf_bellboard.h>
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 NRFY_STATIC_INLINE void __nrfy_internal_bellboard_event_enabled_clear(NRF_BELLBOARD_Type * p_reg,
45 uint32_t mask,
46 nrf_bellboard_event_t event);
47
48 NRFY_STATIC_INLINE bool __nrfy_internal_bellboard_event_handle(NRF_BELLBOARD_Type * p_reg,
49 uint32_t mask,
50 nrf_bellboard_event_t event,
51 uint32_t * p_evt_mask);
52
53 NRFY_STATIC_INLINE uint32_t __nrfy_internal_bellboard_events_process(NRF_BELLBOARD_Type * p_reg,
54 uint32_t mask);
55
56 /**
57 * @defgroup nrfy_bellboard BELLBOARD HALY
58 * @{
59 * @ingroup nrf_bellboard
60 * @brief Hardware access layer with cache and barrier support for managing the BELLBOARD peripheral.
61 */
62
63 /* BELLBOARD0_IRQn is not defined for RISC-V targets, so the interrupt (un)init functions need to be excluded from compilation.
64 * RISC-V targets should use (and initialize) VEVIF for receiving inter-core signals.
65 */
66 #if defined(ISA_ARM) || defined(__NRFX_DOXYGEN__)
67 /**
68 * @brief Function for initializing the specified BELLBOARD interupts.
69 *
70 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
71 * @param[in] mask Mask of interrupts to be initialized.
72 * @param[in] irq_priority Interrupt priority.
73 * @param[in] enable True if the interrupts are to be enabled, false otherwise.
74 * @param[in] group_idx Index of interrupts group to be enabled.
75 */
nrfy_bellboard_int_init(NRF_BELLBOARD_Type * p_reg,uint32_t mask,uint8_t irq_priority,bool enable,uint8_t group_idx)76 NRFY_STATIC_INLINE void nrfy_bellboard_int_init(NRF_BELLBOARD_Type * p_reg,
77 uint32_t mask,
78 uint8_t irq_priority,
79 bool enable,
80 uint8_t group_idx)
81 {
82 IRQn_Type interrupt_index = (IRQn_Type)((uint32_t)BELLBOARD_0_IRQn + group_idx);
83
84 for (uint8_t i = 0; i < NRF_BELLBOARD_EVENTS_TRIGGERED_COUNT; i++)
85 {
86 nrf_bellboard_event_t event = nrf_bellboard_triggered_event_get(i);
87 __nrfy_internal_bellboard_event_enabled_clear(p_reg, mask, event);
88 }
89
90 nrf_barrier_w();
91
92 NRFX_IRQ_PRIORITY_SET(interrupt_index, irq_priority);
93 NRFX_IRQ_ENABLE(interrupt_index);
94
95 if (enable)
96 {
97 nrf_bellboard_int_enable(p_reg, group_idx, mask);
98 }
99
100 nrf_barrier_w();
101 }
102
103 /**
104 * @brief Function for uninitializing the specified BELLBOARD interrupts.
105 *
106 * @param[in] group_idx Index for interrupt group to be uninitialized.
107 */
nrfy_bellboard_int_uninit(uint8_t group_idx)108 NRFY_STATIC_INLINE void nrfy_bellboard_int_uninit(uint8_t group_idx)
109 {
110 IRQn_Type interrupt_index = (IRQn_Type)((uint32_t)BELLBOARD_0_IRQn + group_idx);
111
112 NRFX_IRQ_DISABLE(interrupt_index);
113 nrf_barrier_w();
114 }
115 #endif // // defined(ISA_ARM) || defined(__NRFX_DOXYGEN__)
116
117 /**
118 * @brief Function for processing the specified BELLBOARD events.
119 *
120 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
121 * @param[in] mask Mask of events to be processed, created by @ref NRFY_EVENT_TO_INT_BITMASK.
122 *
123 * @return Mask of events that were generated and processed.
124 * To be checked against the result of @ref NRFY_EVENT_TO_INT_BITMASK().
125 */
126
nrfy_bellboard_events_process(NRF_BELLBOARD_Type * p_reg,uint32_t mask)127 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_events_process(NRF_BELLBOARD_Type * p_reg, uint32_t mask)
128 {
129 uint32_t evt_mask = __nrfy_internal_bellboard_events_process(p_reg, mask);
130 nrf_barrier_w();
131
132 return evt_mask;
133 }
134
135 /** @refhal{nrf_bellboard_task_trigger} */
nrfy_bellboard_task_trigger(NRF_BELLBOARD_Type * p_reg,nrf_bellboard_task_t task)136 NRFY_STATIC_INLINE void nrfy_bellboard_task_trigger(NRF_BELLBOARD_Type * p_reg,
137 nrf_bellboard_task_t task)
138 {
139 nrf_bellboard_task_trigger(p_reg, task);
140 nrf_barrier_w();
141 }
142
143 /** @refhal{nrf_bellboard_task_address_get} */
nrfy_bellboard_task_address_get(NRF_BELLBOARD_Type const * p_reg,nrf_bellboard_task_t task)144 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_task_address_get(NRF_BELLBOARD_Type const * p_reg,
145 nrf_bellboard_task_t task)
146 {
147 return nrf_bellboard_task_address_get(p_reg, task);
148 }
149
150 /** @refhal{nrf_bellboard_event_clear} */
nrfy_bellboard_event_clear(NRF_BELLBOARD_Type * p_reg,nrf_bellboard_event_t event)151 NRFY_STATIC_INLINE void nrfy_bellboard_event_clear(NRF_BELLBOARD_Type * p_reg,
152 nrf_bellboard_event_t event)
153 {
154 nrf_bellboard_event_clear(p_reg, event);
155 nrf_barrier_w();
156 }
157
158 /** @refhal{nrf_bellboard_event_check} */
nrfy_bellboard_event_check(NRF_BELLBOARD_Type const * p_reg,nrf_bellboard_event_t event)159 NRFY_STATIC_INLINE bool nrfy_bellboard_event_check(NRF_BELLBOARD_Type const * p_reg,
160 nrf_bellboard_event_t event)
161 {
162 bool ret = nrf_bellboard_event_check(p_reg, event);
163 nrf_barrier_r();
164
165 return ret;
166 }
167
168 /** @refhal{nrf_bellboard_event_address_get} */
nrfy_bellboard_event_address_get(NRF_BELLBOARD_Type const * p_reg,nrf_bellboard_event_t event)169 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_event_address_get(NRF_BELLBOARD_Type const * p_reg,
170 nrf_bellboard_event_t event)
171 {
172 return nrf_bellboard_event_address_get(p_reg, event);
173 }
174
175 /** @refhal{nrf_bellboard_int_enable} */
nrfy_bellboard_int_enable(NRF_BELLBOARD_Type * p_reg,uint8_t group_idx,uint32_t mask)176 NRFY_STATIC_INLINE void nrfy_bellboard_int_enable(NRF_BELLBOARD_Type * p_reg,
177 uint8_t group_idx,
178 uint32_t mask)
179 {
180 nrf_bellboard_int_enable(p_reg, group_idx, mask);
181 nrf_barrier_w();
182 }
183
184 /** @refhal{nrf_bellboard_int_disable} */
nrfy_bellboard_int_disable(NRF_BELLBOARD_Type * p_reg,uint8_t group_idx,uint32_t mask)185 NRFY_STATIC_INLINE void nrfy_bellboard_int_disable(NRF_BELLBOARD_Type * p_reg,
186 uint8_t group_idx,
187 uint32_t mask)
188 {
189 nrf_bellboard_int_disable(p_reg, group_idx, mask);
190 nrf_barrier_w();
191 }
192
193 /** @refhal{nrf_bellboard_int_enable_check} */
nrfy_bellboard_int_enable_check(NRF_BELLBOARD_Type const * p_reg,uint8_t group_idx,uint32_t mask)194 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_int_enable_check(NRF_BELLBOARD_Type const * p_reg,
195 uint8_t group_idx,
196 uint32_t mask)
197 {
198 uint32_t ret = nrf_bellboard_int_enable_check(p_reg, group_idx, mask);
199 nrf_barrier_r();
200
201 return ret;
202 }
203
204 /** @refhal{nrf_bellboard_int_pending_get} */
nrfy_bellboard_int_pending_get(NRF_BELLBOARD_Type const * p_reg,uint8_t group_idx)205 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_int_pending_get(NRF_BELLBOARD_Type const * p_reg,
206 uint8_t group_idx)
207 {
208 nrf_barrier_r();
209 uint32_t int_ret = nrf_bellboard_int_pending_get(p_reg, group_idx);
210 nrf_barrier_r();
211
212 return int_ret;
213 }
214
215 /** @} */
216
__nrfy_internal_bellboard_events_process(NRF_BELLBOARD_Type * p_reg,uint32_t mask)217 NRFY_STATIC_INLINE uint32_t __nrfy_internal_bellboard_events_process(NRF_BELLBOARD_Type * p_reg, uint32_t mask)
218 {
219 uint32_t evt_mask = 0;
220
221 nrf_barrier_r();
222 for (uint8_t i = 0; i < NRF_BELLBOARD_EVENTS_TRIGGERED_COUNT; i++)
223 {
224 nrf_bellboard_event_t event = nrf_bellboard_triggered_event_get(i);
225 (void)__nrfy_internal_bellboard_event_handle(p_reg, mask, event, &evt_mask);
226 }
227
228 return evt_mask;
229 }
230
__nrfy_internal_bellboard_event_handle(NRF_BELLBOARD_Type * p_reg,uint32_t mask,nrf_bellboard_event_t event,uint32_t * p_evt_mask)231 NRFY_STATIC_INLINE bool __nrfy_internal_bellboard_event_handle(NRF_BELLBOARD_Type * p_reg,
232 uint32_t mask,
233 nrf_bellboard_event_t event,
234 uint32_t * p_evt_mask)
235 {
236 if ((mask & NRFY_EVENT_TO_INT_BITMASK(event)) && nrf_bellboard_event_check(p_reg, event))
237 {
238 nrf_bellboard_event_clear(p_reg, event);
239
240 if (p_evt_mask)
241 {
242 *p_evt_mask |= NRFY_EVENT_TO_INT_BITMASK(event);
243 }
244
245 return true;
246 }
247
248 return false;
249 }
250
__nrfy_internal_bellboard_event_enabled_clear(NRF_BELLBOARD_Type * p_reg,uint32_t mask,nrf_bellboard_event_t event)251 NRFY_STATIC_INLINE void __nrfy_internal_bellboard_event_enabled_clear(NRF_BELLBOARD_Type * p_reg,
252 uint32_t mask,
253 nrf_bellboard_event_t event)
254 {
255 if ((mask & NRFY_EVENT_TO_INT_BITMASK(event)))
256 {
257 nrf_bellboard_event_clear(p_reg, event);
258 }
259 }
260
261 #ifdef __cplusplus
262 }
263 #endif
264
265 #endif // NRFY_BELLBOARD_H__
266
