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Searched refs:mask (Results 1 – 25 of 112) sorted by relevance

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/hal_nordic-latest/nrfx/haly/
Dnrfy_pwm.h45 uint32_t mask,
49 NRFY_STATIC_INLINE uint32_t __nrfy_internal_pwm_events_process(NRF_PWM_Type * p_reg, uint32_t mask);
52 uint32_t mask,
111 uint32_t mask, in nrfy_pwm_int_init() argument
115 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_LOOPSDONE); in nrfy_pwm_int_init()
116 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_SEQEND0); in nrfy_pwm_int_init()
117 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_SEQEND1); in nrfy_pwm_int_init()
118 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_STOPPED); in nrfy_pwm_int_init()
119 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_SEQSTARTED0); in nrfy_pwm_int_init()
120 __nrfy_internal_pwm_event_enabled_clear(p_reg, mask, NRF_PWM_EVENT_SEQSTARTED1); in nrfy_pwm_int_init()
[all …]
Dnrfy_uarte.h54 uint32_t mask,
58 uint32_t mask,
64 uint32_t mask,
139 uint32_t mask, in nrfy_uarte_int_init() argument
143 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_CTS); in nrfy_uarte_int_init()
144 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_NCTS); in nrfy_uarte_int_init()
145 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_RXDRDY); in nrfy_uarte_int_init()
146 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_ENDRX); in nrfy_uarte_int_init()
147 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_TXDRDY); in nrfy_uarte_int_init()
148 __nrfy_internal_uarte_event_enabled_clear(p_reg, mask, NRF_UARTE_EVENT_ENDTX); in nrfy_uarte_int_init()
[all …]
Dnrfy_rtc.h45 uint32_t mask,
50 uint32_t mask);
53 uint32_t mask,
91 uint32_t mask, in nrfy_rtc_int_init() argument
95 __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, NRF_RTC_EVENT_TICK); in nrfy_rtc_int_init()
96 __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, NRF_RTC_EVENT_OVERFLOW); in nrfy_rtc_int_init()
100 __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, nrf_rtc_compare_event_get(i)); in nrfy_rtc_int_init()
109 nrf_rtc_int_enable(p_reg, mask); in nrfy_rtc_int_init()
135 uint32_t mask) in nrfy_rtc_events_process() argument
137 uint32_t evt_mask = __nrfy_internal_rtc_events_process(p_reg, mask); in nrfy_rtc_events_process()
[all …]
Dnrfy_tbm.h45 uint32_t mask,
49 uint32_t mask,
80 uint32_t mask, in nrfy_tbm_int_init() argument
84 __nrfy_internal_tbm_event_enabled_clear(p_reg, mask, NRF_TBM_EVENT_HALFFULL); in nrfy_tbm_int_init()
85 __nrfy_internal_tbm_event_enabled_clear(p_reg, mask, NRF_TBM_EVENT_FULL); in nrfy_tbm_int_init()
86 __nrfy_internal_tbm_event_enabled_clear(p_reg, mask, NRF_TBM_EVENT_FLUSH); in nrfy_tbm_int_init()
93 nrf_tbm_int_enable(p_reg, mask); in nrfy_tbm_int_init()
119 NRFY_STATIC_INLINE uint32_t nrfy_tbm_events_process(NRF_TBM_Type * p_reg, uint32_t mask) in nrfy_tbm_events_process() argument
125 evt_mask = __nrfy_internal_tbm_event_handle(p_reg, mask, NRF_TBM_EVENT_HALFFULL); in nrfy_tbm_events_process()
126 evt_mask |= __nrfy_internal_tbm_event_handle(p_reg, mask, NRF_TBM_EVENT_FULL); in nrfy_tbm_events_process()
[all …]
Dnrfy_lpcomp.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
108 uint32_t mask, in nrfy_lpcomp_int_init() argument
112 __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_READY); in nrfy_lpcomp_int_init()
113 __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_DOWN); in nrfy_lpcomp_int_init()
114 __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_UP); in nrfy_lpcomp_int_init()
115 __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_CROSS); in nrfy_lpcomp_int_init()
122 nrf_lpcomp_int_enable(p_reg, mask); in nrfy_lpcomp_int_init()
148 uint32_t mask) in nrfy_lpcomp_events_process() argument
[all …]
Dnrfy_comp.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
119 uint32_t mask, in nrfy_comp_int_init() argument
124 __nrfy_internal_comp_event_enabled_clear(p_reg, mask, NRF_COMP_EVENT_READY); in nrfy_comp_int_init()
125 __nrfy_internal_comp_event_enabled_clear(p_reg, mask, NRF_COMP_EVENT_DOWN); in nrfy_comp_int_init()
126 __nrfy_internal_comp_event_enabled_clear(p_reg, mask, NRF_COMP_EVENT_UP); in nrfy_comp_int_init()
127 __nrfy_internal_comp_event_enabled_clear(p_reg, mask, NRF_COMP_EVENT_CROSS); in nrfy_comp_int_init()
134 nrf_comp_int_enable(p_reg, mask); in nrfy_comp_int_init()
160 uint32_t mask) in nrfy_comp_events_process() argument
[all …]
Dnrfy_twim.h48 uint32_t mask,
52 uint32_t mask,
58 uint32_t mask,
131 uint32_t mask, in nrfy_twim_int_init() argument
135 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_TXSTARTED); in nrfy_twim_int_init()
136 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_RXSTARTED); in nrfy_twim_int_init()
137 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_LASTTX); in nrfy_twim_int_init()
138 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_LASTRX); in nrfy_twim_int_init()
139 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_STOPPED); in nrfy_twim_int_init()
140 __nrfy_internal_twim_event_enabled_clear(p_reg, mask, NRF_TWIM_EVENT_SUSPENDED); in nrfy_twim_int_init()
[all …]
Dnrfy_nfct.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
133 uint32_t mask, in nrfy_nfct_int_init() argument
139 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_READY); in nrfy_nfct_int_init()
140 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_FIELDDETECTED); in nrfy_nfct_int_init()
141 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_FIELDLOST); in nrfy_nfct_int_init()
142 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_TXFRAMESTART); in nrfy_nfct_int_init()
143 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_TXFRAMEEND); in nrfy_nfct_int_init()
144 __nrfy_internal_nfct_event_enabled_clear(p_reg, mask, NRF_NFCT_EVENT_RXFRAMESTART); in nrfy_nfct_int_init()
[all …]
Dnrfy_bellboard.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
77 uint32_t mask, in nrfy_bellboard_int_init() argument
87 __nrfy_internal_bellboard_event_enabled_clear(p_reg, mask, event); in nrfy_bellboard_int_init()
97 nrf_bellboard_int_enable(p_reg, group_idx, mask); in nrfy_bellboard_int_init()
127 NRFY_STATIC_INLINE uint32_t nrfy_bellboard_events_process(NRF_BELLBOARD_Type * p_reg, uint32_t mask) in nrfy_bellboard_events_process() argument
129 uint32_t evt_mask = __nrfy_internal_bellboard_events_process(p_reg, mask); in nrfy_bellboard_events_process()
178 uint32_t mask) in nrfy_bellboard_int_enable() argument
180 nrf_bellboard_int_enable(p_reg, group_idx, mask); in nrfy_bellboard_int_enable()
[all …]
Dnrfy_qdec.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
142 uint32_t mask, in nrfy_qdec_int_init() argument
146 __nrfy_internal_qdec_event_enabled_clear(p_reg, mask, NRF_QDEC_EVENT_SAMPLERDY); in nrfy_qdec_int_init()
147 __nrfy_internal_qdec_event_enabled_clear(p_reg, mask, NRF_QDEC_EVENT_REPORTRDY); in nrfy_qdec_int_init()
148 __nrfy_internal_qdec_event_enabled_clear(p_reg, mask, NRF_QDEC_EVENT_ACCOF); in nrfy_qdec_int_init()
150 __nrfy_internal_qdec_event_enabled_clear(p_reg, mask, NRF_QDEC_EVENT_DBLRDY); in nrfy_qdec_int_init()
153 __nrfy_internal_qdec_event_enabled_clear(p_reg, mask, NRF_QDEC_EVENT_STOPPED); in nrfy_qdec_int_init()
163 nrf_qdec_int_enable(p_reg, mask); in nrfy_qdec_int_init()
[all …]
Dnrfy_wdt.h45 uint32_t mask,
49 NRFY_STATIC_INLINE uint32_t __nrfy_internal_wdt_events_process(NRF_WDT_Type * p_reg, uint32_t mask);
52 uint32_t mask,
99 uint32_t mask, in nrfy_wdt_int_init() argument
103 __nrfy_internal_wdt_event_enabled_clear(p_reg, mask, NRF_WDT_EVENT_TIMEOUT); in nrfy_wdt_int_init()
105 __nrfy_internal_wdt_event_enabled_clear(p_reg, mask, NRF_WDT_EVENT_STOPPED); in nrfy_wdt_int_init()
114 nrf_wdt_int_enable(p_reg, mask); in nrfy_wdt_int_init()
139 NRFY_STATIC_INLINE uint32_t nrfy_wdt_events_process(NRF_WDT_Type * p_reg, uint32_t mask) in nrfy_wdt_events_process() argument
141 uint32_t evt_mask = __nrfy_internal_wdt_events_process(p_reg, mask); in nrfy_wdt_events_process()
184 NRFY_STATIC_INLINE void nrfy_wdt_int_enable(NRF_WDT_Type * p_reg, uint32_t mask) in nrfy_wdt_int_enable() argument
[all …]
Dnrfy_timer.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask);
102 uint32_t mask, in nrfy_timer_int_init() argument
108 __nrfy_internal_timer_event_enabled_clear(p_reg, mask, nrf_timer_compare_event_get(i)); in nrfy_timer_int_init()
117 nrf_timer_int_enable(p_reg, mask); in nrfy_timer_int_init()
143 uint32_t mask) in nrfy_timer_events_process() argument
145 uint32_t evt_mask = __nrfy_internal_timer_events_process(p_reg, mask); in nrfy_timer_events_process()
213 uint32_t mask) in nrfy_timer_shorts_enable() argument
215 nrf_timer_shorts_enable(p_reg, mask); in nrfy_timer_shorts_enable()
[all …]
Dnrfy_saadc.h47 uint32_t mask,
53 uint32_t mask,
57 uint32_t mask,
115 uint32_t mask, in nrfy_saadc_int_init() argument
119 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_STARTED); in nrfy_saadc_int_init()
120 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_END); in nrfy_saadc_int_init()
121 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_DONE); in nrfy_saadc_int_init()
122 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_RESULTDONE); in nrfy_saadc_int_init()
123 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_CALIBRATEDONE); in nrfy_saadc_int_init()
124 __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_STOPPED); in nrfy_saadc_int_init()
[all …]
Dnrfy_mvdma.h48 uint32_t mask,
54 uint32_t mask,
58 uint32_t mask,
120 uint32_t mask, in nrfy_mvdma_int_init() argument
124 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_END); in nrfy_mvdma_int_init()
125 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_RESET); in nrfy_mvdma_int_init()
126 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_STARTED); in nrfy_mvdma_int_init()
128 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_PAUSED); in nrfy_mvdma_int_init()
130 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_STOPPED); in nrfy_mvdma_int_init()
132 __nrfy_internal_mvdma_event_enabled_clear(p_reg, mask, NRF_MVDMA_EVENT_SINKBUSERROR); in nrfy_mvdma_int_init()
[all …]
Dnrfy_i2s.h47 uint32_t mask,
52 uint32_t mask,
56 uint32_t mask,
134 uint32_t mask, in nrfy_i2s_int_init() argument
138 __nrfy_internal_i2s_event_enabled_clear(p_reg, mask, NRF_I2S_EVENT_RXPTRUPD); in nrfy_i2s_int_init()
139 __nrfy_internal_i2s_event_enabled_clear(p_reg, mask, NRF_I2S_EVENT_TXPTRUPD); in nrfy_i2s_int_init()
140 __nrfy_internal_i2s_event_enabled_clear(p_reg, mask, NRF_I2S_EVENT_STOPPED); in nrfy_i2s_int_init()
142 __nrfy_internal_i2s_event_enabled_clear(p_reg, mask, NRF_I2S_EVENT_FRAMESTART); in nrfy_i2s_int_init()
151 nrf_i2s_int_enable(p_reg, mask); in nrfy_i2s_int_init()
180 uint32_t mask, in nrfy_i2s_events_process() argument
[all …]
Dnrfy_gpiote.h45 uint32_t mask,
49 uint32_t mask,
54 uint32_t mask,
81 uint32_t mask, in nrfy_gpiote_int_init() argument
89 mask, in nrfy_gpiote_int_init()
93 __nrfy_internal_gpiote_event_enabled_clear(p_reg, mask, NRF_GPIOTE_EVENT_PORT); in nrfy_gpiote_int_init()
108 nrf_gpiote_int_enable(p_reg, mask); in nrfy_gpiote_int_init()
124 uint32_t mask, in nrfy_gpiote_events_process() argument
127 uint32_t evt_mask = __nrfy_internal_gpiote_events_process(p_reg, mask, channels_number); in nrfy_gpiote_events_process()
171 NRFY_STATIC_INLINE void nrfy_gpiote_int_enable(NRF_GPIOTE_Type * p_reg, uint32_t mask) in nrfy_gpiote_int_enable() argument
[all …]
Dnrfy_pdm.h47 uint32_t mask,
52 uint32_t mask,
56 uint32_t mask,
149 uint32_t mask, in nrfy_pdm_int_init() argument
153 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_STARTED); in nrfy_pdm_int_init()
154 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_END); in nrfy_pdm_int_init()
155 __nrfy_internal_pdm_event_enabled_clear(p_reg, mask, NRF_PDM_EVENT_STOPPED); in nrfy_pdm_int_init()
162 nrf_pdm_int_enable(p_reg, mask); in nrfy_pdm_int_init()
190 uint32_t mask, in nrfy_pdm_events_process() argument
193 uint32_t evt_mask = __nrfy_internal_pdm_events_process(p_reg, mask, p_buffer); in nrfy_pdm_events_process()
[all …]
Dnrfy_spim.h47 uint32_t mask,
53 uint32_t mask,
57 uint32_t mask,
248 uint32_t mask, in nrfy_spim_int_init() argument
252 __nrfy_internal_spim_event_enabled_clear(p_reg, mask, NRF_SPIM_EVENT_STOPPED); in nrfy_spim_int_init()
253 __nrfy_internal_spim_event_enabled_clear(p_reg, mask, NRF_SPIM_EVENT_ENDRX); in nrfy_spim_int_init()
254 __nrfy_internal_spim_event_enabled_clear(p_reg, mask, NRF_SPIM_EVENT_END); in nrfy_spim_int_init()
255 __nrfy_internal_spim_event_enabled_clear(p_reg, mask, NRF_SPIM_EVENT_ENDTX); in nrfy_spim_int_init()
256 __nrfy_internal_spim_event_enabled_clear(p_reg, mask, NRF_SPIM_EVENT_STARTED); in nrfy_spim_int_init()
263 nrf_spim_int_enable(p_reg, mask); in nrfy_spim_int_init()
[all …]
/hal_nordic-latest/nrfx/hal/
Dnrf_grtc.h505 NRF_STATIC_INLINE void nrf_grtc_int_enable(NRF_GRTC_Type * p_reg, uint32_t mask);
514 NRF_STATIC_INLINE void nrf_grtc_int_disable(NRF_GRTC_Type * p_reg, uint32_t mask);
525 NRF_STATIC_INLINE uint32_t nrf_grtc_int_enable_check(NRF_GRTC_Type const * p_reg, uint32_t mask);
554 uint32_t mask);
569 uint32_t mask);
586 uint32_t mask);
598 NRF_STATIC_INLINE void nrf_grtc_event_enable(NRF_GRTC_Type * p_reg, uint32_t mask);
608 NRF_STATIC_INLINE void nrf_grtc_event_disable(NRF_GRTC_Type * p_reg, uint32_t mask);
618 NRF_STATIC_INLINE void nrf_grtc_shorts_enable(NRF_GRTC_Type * p_reg, uint32_t mask);
626 NRF_STATIC_INLINE void nrf_grtc_shorts_disable(NRF_GRTC_Type * p_reg, uint32_t mask);
[all …]
Dnrf_cracen_cm.h107 nrf_cracen_cm_config_indirect_mask_t mask);
132 NRF_STATIC_INLINE void nrf_cracen_cm_int_enable(NRF_CRACENCORE_Type * p_reg, uint32_t mask);
141 NRF_STATIC_INLINE void nrf_cracen_cm_int_disable(NRF_CRACENCORE_Type * p_reg, uint32_t mask);
153 uint32_t mask);
162 NRF_STATIC_INLINE void nrf_cracen_cm_int_clear(NRF_CRACENCORE_Type * p_reg, uint32_t mask);
184 uint32_t mask);
201 nrf_cracen_cm_config_indirect_mask_t mask) in nrf_cracen_cm_config_indirect_set() argument
203 p_reg->CRYPTMSTRDMA.CONFIG = (uint32_t)mask; in nrf_cracen_cm_config_indirect_set()
218 NRF_STATIC_INLINE void nrf_cracen_cm_int_enable(NRF_CRACENCORE_Type * p_reg, uint32_t mask) in nrf_cracen_cm_int_enable() argument
220 p_reg->CRYPTMSTRDMA.INTENSET = mask; in nrf_cracen_cm_int_enable()
[all …]
Dnrf_vpr_csr_vevif.h66 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_tasks_clear(uint32_t mask);
94 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_events_trigger(uint32_t mask);
144 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_int_enable(uint32_t mask);
151 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_int_disable(uint32_t mask);
160 NRF_STATIC_INLINE uint32_t nrf_vpr_csr_vevif_int_enable_check(uint32_t mask);
168 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_tasks_clear(uint32_t mask) in nrf_vpr_csr_vevif_tasks_clear() argument
170 nrf_csr_clear_bits(VPRCSR_NORDIC_TASKS, mask); in nrf_vpr_csr_vevif_tasks_clear()
188 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_events_trigger(uint32_t mask) in nrf_vpr_csr_vevif_events_trigger() argument
190 nrf_csr_set_bits(VPRCSR_NORDIC_EVENTS, mask); in nrf_vpr_csr_vevif_events_trigger()
224 NRF_STATIC_INLINE void nrf_vpr_csr_vevif_int_enable(uint32_t mask) in nrf_vpr_csr_vevif_int_enable() argument
[all …]
Dnrf_ipct.h285 uint32_t mask);
297 uint32_t mask);
311 uint32_t mask);
424 NRF_STATIC_INLINE void nrf_ipct_shorts_enable(NRF_IPCT_Type * p_reg, uint32_t mask);
432 NRF_STATIC_INLINE void nrf_ipct_shorts_disable(NRF_IPCT_Type * p_reg, uint32_t mask);
440 NRF_STATIC_INLINE void nrf_ipct_shorts_set(NRF_IPCT_Type * p_reg, uint32_t mask);
473 uint32_t mask) in nrf_ipct_int_enable() argument
479 p_reg->INTENSET0 = mask; in nrf_ipct_int_enable()
484 p_reg->INTENSET1 = mask; in nrf_ipct_int_enable()
489 p_reg->INTENSET2 = mask; in nrf_ipct_int_enable()
[all …]
Dnrf_rng.h83 NRF_STATIC_INLINE void nrf_rng_int_enable(NRF_RNG_Type * p_reg, uint32_t mask);
92 NRF_STATIC_INLINE void nrf_rng_int_disable(NRF_RNG_Type * p_reg, uint32_t mask);
103 NRF_STATIC_INLINE uint32_t nrf_rng_int_enable_check(NRF_RNG_Type const * p_reg, uint32_t mask);
164 NRF_STATIC_INLINE void nrf_rng_shorts_enable(NRF_RNG_Type * p_reg, uint32_t mask);
172 NRF_STATIC_INLINE void nrf_rng_shorts_disable(NRF_RNG_Type * p_reg, uint32_t mask);
246 NRF_STATIC_INLINE void nrf_rng_int_enable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_int_enable() argument
248 p_reg->INTENSET = mask; in nrf_rng_int_enable()
251 NRF_STATIC_INLINE void nrf_rng_int_disable(NRF_RNG_Type * p_reg, uint32_t mask) in nrf_rng_int_disable() argument
253 p_reg->INTENCLR = mask; in nrf_rng_int_disable()
256 NRF_STATIC_INLINE uint32_t nrf_rng_int_enable_check(NRF_RNG_Type const * p_reg, uint32_t mask) in nrf_rng_int_enable_check() argument
[all …]
Dnrf_gpiote.h342 NRF_STATIC_INLINE void nrf_gpiote_int_enable(NRF_GPIOTE_Type * p_reg, uint32_t mask);
351 NRF_STATIC_INLINE void nrf_gpiote_int_disable(NRF_GPIOTE_Type * p_reg, uint32_t mask);
363 uint32_t mask);
376 uint32_t mask);
388 uint32_t mask);
402 uint32_t mask);
656 NRF_STATIC_INLINE void nrf_gpiote_int_enable(NRF_GPIOTE_Type * p_reg, uint32_t mask) in nrf_gpiote_int_enable() argument
658 p_reg->NRFX_CONCAT_2(INTENSET, NRF_GPIOTE_IRQ_GROUP) = mask; in nrf_gpiote_int_enable()
661 NRF_STATIC_INLINE void nrf_gpiote_int_disable(NRF_GPIOTE_Type * p_reg, uint32_t mask) in nrf_gpiote_int_disable() argument
663 p_reg->NRFX_CONCAT_2(INTENCLR, NRF_GPIOTE_IRQ_GROUP) = mask; in nrf_gpiote_int_disable()
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Dnrf_wdt.h152 NRF_STATIC_INLINE void nrf_wdt_behaviour_set(NRF_WDT_Type * p_reg, uint32_t mask);
188 NRF_STATIC_INLINE void nrf_wdt_int_enable(NRF_WDT_Type * p_reg, uint32_t mask);
199 NRF_STATIC_INLINE uint32_t nrf_wdt_int_enable_check(NRF_WDT_Type const * p_reg, uint32_t mask);
208 NRF_STATIC_INLINE void nrf_wdt_int_disable(NRF_WDT_Type * p_reg, uint32_t mask);
218 NRF_STATIC_INLINE void nrf_wdt_nmi_int_enable(NRF_WDT_Type * p_reg, uint32_t mask);
229 NRF_STATIC_INLINE uint32_t nrf_wdt_nmi_int_enable_check(NRF_WDT_Type const * p_reg, uint32_t mask);
238 NRF_STATIC_INLINE void nrf_wdt_nmi_int_disable(NRF_WDT_Type * p_reg, uint32_t mask);
406 NRF_STATIC_INLINE void nrf_wdt_behaviour_set(NRF_WDT_Type * p_reg, uint32_t mask) in nrf_wdt_behaviour_set() argument
408 p_reg->CONFIG = mask; in nrf_wdt_behaviour_set()
427 NRF_STATIC_INLINE void nrf_wdt_int_enable(NRF_WDT_Type * p_reg, uint32_t mask) in nrf_wdt_int_enable() argument
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