Home
last modified time | relevance | path

Searched refs:int_mask (Results 1 – 11 of 11) sorted by relevance

/hal_nordic-latest/nrfx/drivers/src/
Dnrfx_twim.c93 volatile uint32_t int_mask; member
149 if (((p_cb->int_mask & NRF_TWIM_INT_SUSPENDED_MASK) && in xfer_completeness_check()
151 (!(p_cb->int_mask & NRF_TWIM_INT_SUSPENDED_MASK) && in xfer_completeness_check()
303 p_cb->int_mask = 0; in nrfx_twim_init()
413 p_cb->int_mask = 0; in nrfx_twim_disable()
470 nrfy_twim_int_enable(p_twim, p_cb->int_mask); in twim_xfer()
517 p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK; in twim_xfer()
525 p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK; in twim_xfer()
532 p_cb->int_mask = NRF_TWIM_INT_SUSPENDED_MASK; in twim_xfer()
537 p_cb->int_mask = NRF_TWIM_INT_STOPPED_MASK; in twim_xfer()
[all …]
Dnrfx_clock.c197 uint32_t int_mask; in clock_stop() local
203 int_mask = NRF_CLOCK_INT_LF_STARTED_MASK; in clock_stop()
208 int_mask = NRF_CLOCK_INT_HF_STARTED_MASK | in clock_stop()
220 int_mask = NRF_CLOCK_INT_HF192M_STARTED_MASK; in clock_stop()
227 int_mask = NRF_CLOCK_INT_HFAUDIO_STARTED_MASK; in clock_stop()
237 nrf_clock_int_disable(NRF_CLOCK, int_mask); in clock_stop()
396 uint32_t int_mask; in nrfx_clock_start() local
445 int_mask = NRF_CLOCK_INT_LF_STARTED_MASK; in nrfx_clock_start()
450 int_mask = NRF_CLOCK_INT_HF_STARTED_MASK | in nrfx_clock_start()
462 int_mask = NRF_CLOCK_INT_HF192M_STARTED_MASK; in nrfx_clock_start()
[all …]
Dnrfx_egu.c82 static uint32_t egu_event_mask_get_and_clear(NRF_EGU_Type * p_reg, uint32_t int_mask) in egu_event_mask_get_and_clear() argument
85 while (int_mask) in egu_event_mask_get_and_clear()
87 uint8_t event_idx = (uint8_t)NRF_CTZ(int_mask); in egu_event_mask_get_and_clear()
88 int_mask &= ~(1UL << event_idx); in egu_event_mask_get_and_clear()
175 uint32_t int_mask = nrf_egu_int_enable_check(p_reg, ~0UL); in irq_handler() local
179 uint32_t event_mask = egu_event_mask_get_and_clear(p_reg, int_mask); in irq_handler()
Dnrfx_saadc.c669 uint32_t int_mask = nrfy_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_LOW); in nrfx_saadc_limits_set() local
673 nrfy_saadc_int_disable(NRF_SAADC, int_mask); in nrfx_saadc_limits_set()
678 nrfy_saadc_int_enable(NRF_SAADC, int_mask); in nrfx_saadc_limits_set()
681 int_mask = nrfy_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_HIGH); in nrfx_saadc_limits_set()
685 nrfy_saadc_int_disable(NRF_SAADC, int_mask); in nrfx_saadc_limits_set()
690 nrfy_saadc_int_enable(NRF_SAADC, int_mask); in nrfx_saadc_limits_set()
711 uint32_t int_mask = nrfy_saadc_int_enable_check(NRF_SAADC, ~0UL); in nrfx_saadc_offset_calibrate() local
717 int_mask &= ~(uint32_t)(NRF_SAADC_INT_CH0LIMITL | NRF_SAADC_INT_CH0LIMITH); in nrfx_saadc_offset_calibrate()
718 nrfy_saadc_int_set(NRF_SAADC, int_mask | NRF_SAADC_INT_STARTED | NRF_SAADC_INT_STOPPED | in nrfx_saadc_offset_calibrate()
736 nrfy_saadc_int_set(NRF_SAADC, int_mask); in nrfx_saadc_offset_calibrate()
[all …]
Dnrfx_lpcomp.c76 uint32_t int_mask = 0; in lpcomp_configure() local
85 int_mask = NRF_LPCOMP_INT_UP_MASK; in lpcomp_configure()
89 int_mask = NRF_LPCOMP_INT_DOWN_MASK; in lpcomp_configure()
93 int_mask = NRF_LPCOMP_INT_CROSS_MASK; in lpcomp_configure()
99 nrfy_lpcomp_int_init(NRF_LPCOMP, int_mask, p_config->interrupt_priority, true); in lpcomp_configure()
Dnrfx_rtc.c152 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(channel); in nrfx_rtc_cc_disable() local
155 nrfy_rtc_event_disable(p_instance->p_reg, int_mask); in nrfx_rtc_cc_disable()
156 if (nrfy_rtc_int_enable_check(p_instance->p_reg, int_mask)) in nrfx_rtc_cc_disable()
158 nrfy_rtc_int_disable(p_instance->p_reg, int_mask); in nrfx_rtc_cc_disable()
186 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(channel); in nrfx_rtc_cc_set() local
189 nrfy_rtc_event_int_disable(p_instance->p_reg, int_mask); in nrfx_rtc_cc_set()
Dnrfx_pwm.c298 uint32_t int_mask = NRF_PWM_INT_LOOPSDONE_MASK | in start_playback() local
308 int_mask |= NRF_PWM_INT_SEQEND0_MASK | NRF_PWM_INT_SEQEND1_MASK; in start_playback()
312 int_mask |= NRF_PWM_INT_SEQEND0_MASK; in start_playback()
316 int_mask |= NRF_PWM_INT_SEQEND1_MASK; in start_playback()
321 int_mask &= (uint32_t)~NRF_PWM_INT_LOOPSDONE_MASK; in start_playback()
324 nrfy_pwm_int_set(p_instance->p_reg, int_mask); in start_playback()
Dnrfx_uarte.c367 static void uarte_int_unlock(NRF_UARTE_Type * p_uarte, uint32_t int_mask) in uarte_int_unlock() argument
369 nrfy_uarte_int_enable(p_uarte, int_mask); in uarte_int_unlock()
552 uint32_t int_mask = tx_int_mask | ((event_handler) ? rx_int_mask : 0); in nrfx_uarte_init() local
554 nrfy_uarte_int_enable(p_instance->p_reg, int_mask); in nrfx_uarte_init()
1036 uint32_t int_mask; in nrfx_uarte_tx_abort() local
1038 int_mask = uarte_int_lock(p_uarte); in nrfx_uarte_tx_abort()
1041 uarte_int_unlock(p_uarte, int_mask); in nrfx_uarte_tx_abort()
1056 uarte_int_unlock(p_uarte, int_mask); in nrfx_uarte_tx_abort()
2042 uint32_t int_mask) in event_check_and_clear() argument
2044 if (nrfy_uarte_event_check(p_uarte, event) && (int_mask & NRFY_EVENT_TO_INT_BITMASK(event))) { in event_check_and_clear()
[all …]
Dnrfx_qdec.c96 uint32_t int_mask = NRF_QDEC_INT_ACCOF_MASK; in qdec_configure() local
100 int_mask |= NRF_QDEC_INT_REPORTRDY_MASK; in qdec_configure()
105 int_mask |= NRF_QDEC_INT_SAMPLERDY_MASK; in qdec_configure()
107 nrfy_qdec_int_init(p_instance->p_reg, int_mask, p_config->interrupt_priority, true); in qdec_configure()
Dnrfx_twi.c99 volatile uint32_t int_mask; member
216 p_cb->int_mask = 0; in nrfx_twi_init()
501 p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | in twi_tx_start_transfer()
506 nrf_twi_int_enable(p_twi, p_cb->int_mask); in twi_tx_start_transfer()
575 p_cb->int_mask = NRF_TWI_INT_STOPPED_MASK | in twi_rx_start_transfer()
579 nrf_twi_int_enable(p_twi, p_cb->int_mask); in twi_rx_start_transfer()
635 nrf_twi_int_enable(p_twi, p_cb->int_mask); in twi_xfer()
Dnrfx_grtc.c444 uint32_t int_mask = NRF_GRTC_INT_RTCOMPARE_MASK | NRF_GRTC_INT_RTCOMPARESYNC_MASK; in nrfx_grtc_rtcounter_cc_disable() local
455 if (nrfy_grtc_int_enable_check(NRF_GRTC, int_mask)) in nrfx_grtc_rtcounter_cc_disable()
457 nrfy_grtc_int_disable(NRF_GRTC, int_mask); in nrfx_grtc_rtcounter_cc_disable()
697 uint32_t int_mask = NRF_GRTC_CHANNEL_INT_MASK(channel); in nrfx_grtc_syscounter_cc_disable() local
718 if (nrfy_grtc_int_enable_check(NRF_GRTC, int_mask)) in nrfx_grtc_syscounter_cc_disable()
720 nrfy_grtc_int_disable(NRF_GRTC, int_mask); in nrfx_grtc_syscounter_cc_disable()