| /hal_nordic-latest/nrfx/hal/ |
| D | nrf_vpr_csr.h | 181 NRF_STATIC_INLINE void nrf_vpr_csr_machine_cycle_counter_enable_set(bool enable);
203 NRF_STATIC_INLINE void nrf_vpr_csr_machine_instruction_counter_enable_set(bool enable);
224 NRF_STATIC_INLINE void nrf_vpr_csr_rtperiph_enable_set(bool enable);
239 NRF_STATIC_INLINE void nrf_vpr_csr_remap_enable_set(bool enable);
253 NRF_STATIC_INLINE void nrf_vpr_csr_cnt_irq_enable_set(bool enable);
269 NRF_STATIC_INLINE void nrf_vpr_csr_ram_prio_enable_set(bool enable);
300 NRF_STATIC_INLINE void nrf_vpr_csr_return_to_sleep_set(bool enable);
316 NRF_STATIC_INLINE void nrf_vpr_csr_stack_on_sleep_set(bool enable);
332 NRF_STATIC_INLINE void nrf_vpr_csr_clic_round_robin_set(bool enable);
347 NRF_STATIC_INLINE void nrf_vpr_csr_unrecoverable_return_set(bool enable);
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| D | nrf_stm.h | 206 bool enable);
226 …_STATIC_INLINE void nrf_stm_output_set(NRF_STM_Type * p_reg, nrf_stm_output_t output, bool enable);
504 bool enable) in nrf_stm_feature_set() argument
510 (enable << STM_TCSR_EN_Pos)); in nrf_stm_feature_set()
514 (enable << STM_TCSR_TSEN_Pos)); in nrf_stm_feature_set()
518 (enable << STM_TCSR_SYNCEN_Pos)); in nrf_stm_feature_set()
522 (enable << STM_TCSR_COMPEN_Pos)); in nrf_stm_feature_set()
526 (enable << STM_TCSR_BUSY_Pos)); in nrf_stm_feature_set()
530 (enable << STM_AUXCR_FIFOAF_Pos)); in nrf_stm_feature_set()
534 (enable << STM_AUXCR_ASYNCPE_Pos)); in nrf_stm_feature_set()
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| D | nrf_memconf.h | 116 bool enable);
130 bool enable);
157 bool enable);
170 bool enable);
198 bool enable);
225 bool enable);
238 bool enable);
325 bool enable) in nrf_memconf_ramblock_control_enable_set() argument
332 ((enable ? in nrf_memconf_ramblock_control_enable_set()
341 bool enable) in nrf_memconf_ramblock_control_mask_enable_set() argument
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| D | nrf_tampc.h | 373 bool enable);
402 bool enable);
431 bool enable);
460 bool enable);
487 bool enable);
510 bool enable);
533 bool enable);
558 bool enable);
581 bool enable);
604 bool enable);
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| D | nrf_regulators.h | 192 bool enable; ///< Enable or disable POF Comparator. member
221 bool enable);
331 bool enable) in nrf_regulators_vreg_enable_set() argument
337 p_reg->DCDCEN = (enable ? REGULATORS_DCDCEN_DCDCEN_Enabled : in nrf_regulators_vreg_enable_set()
340 p_reg->VREGMAIN.DCDCEN = (enable ? REGULATORS_VREGMAIN_DCDCEN_VAL_Enabled : in nrf_regulators_vreg_enable_set()
344 p_reg->VREGMAIN.DCDCEN = (enable ? REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Enabled : in nrf_regulators_vreg_enable_set()
352 p_reg->VREGH.DCDCEN = (enable ? REGULATORS_VREGH_DCDCEN_DCDCEN_Enabled : in nrf_regulators_vreg_enable_set()
360 p_reg->VREGM.ENABLE = (enable ? REGULATORS_VREGM_ENABLE_ENABLE_Enabled : in nrf_regulators_vreg_enable_set()
368 p_reg->VREGRADIO.DCDCEN = (enable ? REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Enabled : in nrf_regulators_vreg_enable_set()
447 p_reg->POFCON = ((p_config->enable ? REGULATORS_POFCON_POF_Enabled : in nrf_regulators_pof_config_set()
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| D | nrf_oscillators.h | 194 NRF_STATIC_INLINE void nrf_oscillators_lfxo_bypass_set(NRF_OSCILLATORS_Type * p_reg, bool enable);
219 bool enable,
247 NRF_STATIC_INLINE void nrf_oscillators_lfxo_bypass_set(NRF_OSCILLATORS_Type * p_reg, bool enable) in nrf_oscillators_lfxo_bypass_set() argument
249 p_reg->XOSC32KI.BYPASS = (enable ? OSCILLATORS_XOSC32KI_BYPASS_BYPASS_Enabled : in nrf_oscillators_lfxo_bypass_set()
261 bool enable, in nrf_oscillators_hfxo_cap_set() argument
266 (enable ? ((OSCILLATORS_XOSC32MCAPS_ENABLE_Enabled << OSCILLATORS_XOSC32MCAPS_ENABLE_Pos) | in nrf_oscillators_hfxo_cap_set()
270 p_reg->XOSC32M.CONFIG.INTCAP = enable ? cap_value : 0; in nrf_oscillators_hfxo_cap_set()
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| D | nrf_power.h | 821 bool enable,
891 NRF_STATIC_INLINE void nrf_power_dcdcen_set(NRF_POWER_Type * p_reg, bool enable);
960 NRF_STATIC_INLINE void nrf_power_dcdcen_vddh_set(NRF_POWER_Type * p_reg, bool enable);
1070 bool enable);
1126 NRF_STATIC_INLINE void nrf_power_ulp_mode_set(NRF_POWER_Type * p_reg, bool enable);
1150 NRF_STATIC_INLINE void nrf_power_ulv_mode_set(NRF_POWER_Type * p_reg, bool enable);
1185 NRF_STATIC_INLINE void nrf_power_bils_set(NRF_POWER_Type * p_reg, bool enable);
1205 NRF_STATIC_INLINE void nrf_power_pmic_set(NRF_POWER_Type * p_reg, bool enable);
1350 bool enable, in nrf_power_pofcon_set() argument
1362 (enable ? in nrf_power_pofcon_set()
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| D | nrf_exmif.h | 103 bool enable);
112 bool enable);
158 bool enable) in nrf_exmif_reset_set() argument
160 p_reg->RESET = (enable ? (EXMIF_RESET_RESET_Set << EXMIF_RESET_RESET_Pos) : in nrf_exmif_reset_set()
165 bool enable) in nrf_exmif_locked_access_set() argument
168 (enable ? (EXMIF_LOCKEDACCESS_ENABLE_Enabled << EXMIF_LOCKEDACCESS_ENABLE_Pos) : in nrf_exmif_locked_access_set()
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| D | nrf_resetinfo.h | 221 NRF_STATIC_INLINE void nrf_resetinfo_restore_valid_set(NRF_RESETINFO_Type * p_reg, bool enable);
243 NRF_STATIC_INLINE void nrf_resetinfo_mask_lockup_set(NRF_RESETINFO_Type * p_reg, bool enable);
321 NRF_STATIC_INLINE void nrf_resetinfo_restore_valid_set(NRF_RESETINFO_Type * p_reg, bool enable) in nrf_resetinfo_restore_valid_set() argument
323 p_reg->RESTOREVALID = (enable ? RESETINFO_RESTOREVALID_RESTOREVALID_Present : in nrf_resetinfo_restore_valid_set()
336 NRF_STATIC_INLINE void nrf_resetinfo_mask_lockup_set(NRF_RESETINFO_Type * p_reg, bool enable) in nrf_resetinfo_mask_lockup_set() argument
338 p_reg->MASKLOCKUP = (enable ? RESETINFO_MASKLOCKUP_MASK_Mask : in nrf_resetinfo_mask_lockup_set()
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| D | nrf_vreqctrl.h | 56 NRF_STATIC_INLINE void nrf_vreqctrl_radio_high_voltage_set(NRF_VREQCTRL_Type * p_reg, bool enable);
70 NRF_STATIC_INLINE void nrf_vreqctrl_radio_high_voltage_set(NRF_VREQCTRL_Type * p_reg, bool enable) in nrf_vreqctrl_radio_high_voltage_set() argument
73 (enable ? VREQCTRL_VREGRADIO_VREQH_VREQH_Enabled : VREQCTRL_VREGRADIO_VREQH_VREQH_Disabled); in nrf_vreqctrl_radio_high_voltage_set()
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| D | nrf_cracen.h | 170 NRF_STATIC_INLINE void nrf_cracen_seedram_lock_enable_set(NRF_CRACEN_Type * p_reg, bool enable);
241 NRF_STATIC_INLINE void nrf_cracen_seedram_lock_enable_set(NRF_CRACEN_Type * p_reg, bool enable) in nrf_cracen_seedram_lock_enable_set() argument
244 p_reg->SEEDRAMLOCK = (enable ? CRACEN_SEEDRAMLOCK_ENABLE_Enabled in nrf_cracen_seedram_lock_enable_set()
247 p_reg->SEEDLOCK = (enable ? CRACEN_SEEDLOCK_ENABLE_Enabled in nrf_cracen_seedram_lock_enable_set()
250 p_reg->KEYLOCK = (enable ? CRACEN_KEYLOCK_ENABLE_Enabled : CRACEN_KEYLOCK_ENABLE_Disabled) in nrf_cracen_seedram_lock_enable_set()
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| D | nrf_bprot.h | 75 bool enable);
112 bool enable) in nrf_bprot_nvm_protection_in_debug_set() argument
115 (enable ? 0 : BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk); in nrf_bprot_nvm_protection_in_debug_set()
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| D | nrf_cache.h | 277 NRF_STATIC_INLINE void nrf_cache_profiling_set(NRF_CACHE_Type * p_reg, bool enable);
360 NRF_STATIC_INLINE void nrf_cache_ram_mode_set(NRF_CACHE_Type * p_reg, bool enable);
417 NRF_STATIC_INLINE void nrf_cache_update_lock_set(NRF_CACHE_Type * p_reg, bool enable);
621 NRF_STATIC_INLINE void nrf_cache_profiling_set(NRF_CACHE_Type * p_reg, bool enable) in nrf_cache_profiling_set() argument
625 (enable ? CACHE_PROFILINGENABLE_ENABLE_Enable : CACHE_PROFILINGENABLE_ENABLE_Disable); in nrf_cache_profiling_set()
628 (enable ? CACHE_PROFILING_ENABLE_ENABLE_Enable : CACHE_PROFILING_ENABLE_ENABLE_Disable); in nrf_cache_profiling_set()
686 NRF_STATIC_INLINE void nrf_cache_ram_mode_set(NRF_CACHE_Type * p_reg, bool enable) in nrf_cache_ram_mode_set() argument
689 ((enable ? CACHE_MODE_MODE_Ram : CACHE_MODE_MODE_Cache) in nrf_cache_ram_mode_set()
716 NRF_STATIC_INLINE void nrf_cache_update_lock_set(NRF_CACHE_Type * p_reg, bool enable) in nrf_cache_update_lock_set() argument
719 (enable ? CACHE_WRITELOCK_WRITELOCK_Locked : CACHE_WRITELOCK_WRITELOCK_Unlocked); in nrf_cache_update_lock_set()
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| D | nrf_glitchdet.h | 73 NRF_STATIC_INLINE void nrf_glitchdet_enable_set(NRF_GLITCHDET_Type * p_reg, bool enable);
101 NRF_STATIC_INLINE void nrf_glitchdet_enable_set(NRF_GLITCHDET_Type * p_reg, bool enable) in nrf_glitchdet_enable_set() argument
104 ((enable ? GLITCHDET_CONFIG_ENABLE_Enable : GLITCHDET_CONFIG_ENABLE_Disable) << in nrf_glitchdet_enable_set()
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| D | nrf_mpu.h | 121 bool enable);
163 bool enable) in nrf_mpu_nvm_protection_in_debug_set() argument
166 (enable ? 0 : MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk); in nrf_mpu_nvm_protection_in_debug_set()
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| D | nrf_vpr.h | 314 bool enable);
355 bool enable);
434 bool enable) in nrf_vpr_cpurun_set() argument
436 p_reg->CPURUN = (enable ? VPR_CPURUN_EN_Running : VPR_CPURUN_EN_Stopped) << VPR_CPURUN_EN_Pos; in nrf_vpr_cpurun_set()
458 bool enable) in nrf_vpr_debugif_dmcontrol_set() argument
465 ((enable ? VPR_DEBUGIF_DMCONTROL_DMACTIVE_Enabled : in nrf_vpr_debugif_dmcontrol_set()
472 ((enable ? VPR_DEBUGIF_DMCONTROL_NDMRESET_Active : in nrf_vpr_debugif_dmcontrol_set()
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| D | nrf_grtc.h | 808 NRF_STATIC_INLINE void nrf_grtc_sys_counter_active_set(NRF_GRTC_Type * p_reg, bool enable);
910 NRF_STATIC_INLINE void nrf_grtc_sys_counter_set(NRF_GRTC_Type * p_reg, bool enable);
923 NRF_STATIC_INLINE void nrf_grtc_sys_counter_auto_mode_set(NRF_GRTC_Type * p_reg, bool enable);
956 bool enable);
1069 bool enable);
1622 NRF_STATIC_INLINE void nrf_grtc_sys_counter_active_set(NRF_GRTC_Type * p_reg, bool enable) in nrf_grtc_sys_counter_active_set() argument
1626 (enable ? GRTC_SYSCOUNTER_ACTIVE_ACTIVE_Active : in nrf_grtc_sys_counter_active_set()
1697 NRF_STATIC_INLINE void nrf_grtc_sys_counter_set(NRF_GRTC_Type * p_reg, bool enable) in nrf_grtc_sys_counter_set() argument
1700 ((enable ? GRTC_MODE_SYSCOUNTEREN_Enabled : in nrf_grtc_sys_counter_set()
1704 NRF_STATIC_INLINE void nrf_grtc_sys_counter_auto_mode_set(NRF_GRTC_Type * p_reg, bool enable) in nrf_grtc_sys_counter_auto_mode_set() argument
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| D | nrf_twim.h | 666 bool enable);
742 bool enable);
762 bool enable);
1041 bool enable) in nrf_twim_rx_pattern_match_enable_set() argument
1049 ((enable ? in nrf_twim_rx_pattern_match_enable_set()
1057 ((enable ? in nrf_twim_rx_pattern_match_enable_set()
1065 ((enable ? in nrf_twim_rx_pattern_match_enable_set()
1073 ((enable ? in nrf_twim_rx_pattern_match_enable_set()
1206 bool enable) in nrf_twim_rx_terminate_on_bus_error_enable_set() argument
1208 p_reg->DMA.RX.TERMINATEONBUSERROR = (enable ? TWIM_DMA_RX_TERMINATEONBUSERROR_ENABLE_Enabled : in nrf_twim_rx_terminate_on_bus_error_enable_set()
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| D | nrf_ramc.h | 135 NRF_STATIC_INLINE void nrf_ramc_secenable_set(NRF_RAMC_Type * p_reg, bool enable);
187 NRF_STATIC_INLINE void nrf_ramc_secenable_set(NRF_RAMC_Type * p_reg, bool enable) in nrf_ramc_secenable_set() argument
189 p_reg->SECENABLE = (enable ? RAMC_SECENABLE_ENABLE_Enable : RAMC_SECENABLE_ENABLE_Disable) << in nrf_ramc_secenable_set()
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| D | nrf_spu.h | 575 bool enable);
602 bool enable);
735 bool enable);
1093 bool enable) in nrf_spu_periph_perm_dmasec_set() argument
1097 | ((enable ? SPU_PERIPH_PERM_DMASEC_Secure : in nrf_spu_periph_perm_dmasec_set()
1104 bool enable) in nrf_spu_periph_perm_secattr_set() argument
1108 | ((enable ? SPU_PERIPH_PERM_SECATTR_Secure : in nrf_spu_periph_perm_secattr_set()
1695 bool enable) in nrf_spu_feature_secattr_set() argument
1705 ((enable ? in nrf_spu_feature_secattr_set()
1716 ((enable ? in nrf_spu_feature_secattr_set()
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| D | nrf_hsfll.h | 138 bool enable; ///< Enable the clock dithering. member
354 NRF_STATIC_INLINE void nrf_hsfll_mirror_lock_set(NRF_HSFLL_Type * p_reg, bool enable);
490 (((p_config->enable ? in nrf_hsfll_clkctrl_dithering_set()
504 p_config->enable = ((p_reg->CLOCKCTRL.MODE & HSFLL_CLOCKCTRL_DITHERING_EN_Msk) in nrf_hsfll_clkctrl_dithering_get()
581 NRF_STATIC_INLINE void nrf_hsfll_mirror_lock_set(NRF_HSFLL_Type * p_reg, bool enable) in nrf_hsfll_mirror_lock_set() argument
583 p_reg->MIRROR = ((enable ? HSFLL_MIRROR_LOCK_Enabled : HSFLL_MIRROR_LOCK_Disabled) in nrf_hsfll_mirror_lock_set()
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| /hal_nordic-latest/nrfx/helpers/ |
| D | nrfx_ram_ctrl.h | 69 void nrfx_ram_ctrl_power_enable_set(void const * p_object, size_t length, bool enable);
79 void nrfx_ram_ctrl_retention_enable_set(void const * p_object, size_t length, bool enable);
91 bool enable) in nrfx_ram_ctrl_section_power_mask_enable_set() argument
94 nrf_memconf_ramblock_control_mask_enable_set(NRF_MEMCONF, block_idx, section_mask, enable); in nrfx_ram_ctrl_section_power_mask_enable_set()
97 if (enable) in nrfx_ram_ctrl_section_power_mask_enable_set()
108 if (enable) in nrfx_ram_ctrl_section_power_mask_enable_set()
130 bool enable) in nrfx_ram_ctrl_section_retention_mask_enable_set() argument
134 nrf_memconf_ramblock_ret_mask_enable_set(NRF_MEMCONF, block_idx, section_mask, enable); in nrfx_ram_ctrl_section_retention_mask_enable_set()
136 nrf_memconf_ramblock_ret2_mask_enable_set(NRF_MEMCONF, block_idx, section_mask, enable); in nrfx_ram_ctrl_section_retention_mask_enable_set()
141 if (enable) in nrfx_ram_ctrl_section_retention_mask_enable_set()
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| D | nrfx_ram_ctrl.c | 214 bool enable);
218 bool enable) in ram_ctrl_block_section_power_enable_set() argument
220 nrfx_ram_ctrl_section_power_mask_enable_set(block_idx, section_mask, enable); in ram_ctrl_block_section_power_enable_set()
225 bool enable) in ram_ctrl_block_section_retention_enable_set() argument
227 nrfx_ram_ctrl_section_retention_mask_enable_set(block_idx, section_mask, enable); in ram_ctrl_block_section_retention_enable_set()
232 bool enable, in ram_ctrl_block_section_iterate() argument
270 handler(block, 1UL << section, enable); in ram_ctrl_block_section_iterate()
274 void nrfx_ram_ctrl_power_enable_set(void const * p_object, size_t length, bool enable) in nrfx_ram_ctrl_power_enable_set() argument
278 enable, in nrfx_ram_ctrl_power_enable_set()
282 void nrfx_ram_ctrl_retention_enable_set(void const * p_object, size_t length, bool enable) in nrfx_ram_ctrl_retention_enable_set() argument
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| /hal_nordic-latest/nrfx/haly/ |
| D | nrfy_grtc.h | 149 bool enable) in nrfy_grtc_int_init() argument
164 if (enable) in nrfy_grtc_int_init()
375 bool enable) in nrfy_grtc_sys_counter_compare_event_int_clear_enable() argument
379 if (enable) in nrfy_grtc_sys_counter_compare_event_int_clear_enable()
702 NRFY_STATIC_INLINE void nrfy_grtc_sys_counter_set(NRF_GRTC_Type * p_reg, bool enable) in nrfy_grtc_sys_counter_set() argument
704 nrf_grtc_sys_counter_set(p_reg, enable); in nrfy_grtc_sys_counter_set()
709 NRFY_STATIC_INLINE void nrfy_grtc_sys_counter_auto_mode_set(NRF_GRTC_Type * p_reg, bool enable) in nrfy_grtc_sys_counter_auto_mode_set() argument
711 nrf_grtc_sys_counter_auto_mode_set(p_reg, enable); in nrfy_grtc_sys_counter_auto_mode_set()
727 NRFY_STATIC_INLINE void nrfy_grtc_sys_counter_active_set(NRF_GRTC_Type * p_reg, bool enable) in nrfy_grtc_sys_counter_active_set() argument
729 nrf_grtc_sys_counter_active_set(p_reg, enable); in nrfy_grtc_sys_counter_active_set()
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| D | nrfy_vpr.h | 130 bool enable) in nrfy_vpr_cpurun_set() argument
132 nrf_vpr_cpurun_set(p_reg, enable); in nrfy_vpr_cpurun_set()
167 bool enable) in nrfy_vpr_debugif_dmcontrol_set() argument
169 nrf_vpr_debugif_dmcontrol_set(p_reg, signal, enable); in nrfy_vpr_debugif_dmcontrol_set()
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