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Searched refs:VPRCSR_VEVIF_TASKS_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf54l09_enga_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFFFFFF /*!< Mask of supported VEVIF tasks: 0xFFFFFFFF… macro
Dnrf54l05_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFFFFFF /*!< Mask of supported VEVIF tasks: 0xFFFFFFFF… macro
Dnrf54h20_ppr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0x0000FFF0 /*!< Mask of supported VEVIF tasks: 0x0000FFF0… macro
Dnrf54l15_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFFFFFF /*!< Mask of supported VEVIF tasks: 0xFFFFFFFF… macro
Dnrf54h20_flpr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFF0000 /*!< Mask of supported VEVIF tasks: 0xFFFF0000… macro
Dnrf54l10_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFFFFFF /*!< Mask of supported VEVIF tasks: 0xFFFFFFFF… macro
Dnrf9230_enga_flpr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFF0000 /*!< Mask of supported VEVIF tasks: 0xFFFF0000… macro
Dnrf9230_enga_ppr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0x0000FFF0 /*!< Mask of supported VEVIF tasks: 0x0000FFF0… macro
Dnrf9230_engb_flpr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFF0000 /*!< Mask of supported VEVIF tasks: 0xFFFF0000… macro
Dnrf9230_engb_ppr_peripherals.h59 #define VPRCSR_VEVIF_TASKS_MASK 0x0000FFF0 /*!< Mask of supported VEVIF tasks: 0x0000FFF0… macro
Dnrf7120_enga_umac_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0x00FF0000 /*!< Mask of supported VEVIF tasks: 0x00FF0000… macro
Dnrf7120_enga_lmac_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0x00FF0000 /*!< Mask of supported VEVIF tasks: 0x00FF0000… macro
Dnrf54l20_enga_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0xFFFFFFFF /*!< Mask of supported VEVIF tasks: 0xFFFFFFFF… macro
Dnrf7120_enga_flpr_peripherals.h60 #define VPRCSR_VEVIF_TASKS_MASK 0x007F0000 /*!< Mask of supported VEVIF tasks: 0x007F0000… macro