Home
last modified time | relevance | path

Searched refs:TWIS_INTEN_DMATXREADY_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf54l09_enga_types.h32654 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
32655 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf54l15_types.h38055 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
38056 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf54l05_types.h38055 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
38056 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf54l10_types.h38055 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
38056 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf54l20_enga_types.h38962 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
38963 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf7120_enga_types.h50458 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
50459 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf9230_engb_types.h79099 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
79100 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf54h20_types.h78991 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
78992 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…
Dnrf9230_enga_types.h78573 …#define TWIS_INTEN_DMATXREADY_Pos (27UL) /*!< Position of DMATXREADY field. … macro
78574 …#define TWIS_INTEN_DMATXREADY_Msk (0x1UL << TWIS_INTEN_DMATXREADY_Pos) /*!< Bit mask of DMATXREADY…