Searched refs:SPI_INTENSET_READY_Pos (Results 1 – 8 of 8) sorted by relevance
5096 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro5097 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
6948 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro6949 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
7956 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro7957 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
8661 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro8662 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
7299 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro7300 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
11400 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro11401 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
14090 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro14091 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
12092 #define SPI_INTENSET_READY_Pos (2UL) /*!< Position of READY field. */ macro12093 #define SPI_INTENSET_READY_Msk (0x1UL << SPI_INTENSET_READY_Pos) /*!< Bit mask of READY field. */
