Searched refs:SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (Results 1 – 10 of 10) sorted by relevance
1568 << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos)); in nrf_spim_rx_pattern_match_enable_set()1608 >> SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) == in nrf_spim_rx_pattern_match_enable_check()
24561 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro24562 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
29904 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro29905 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
29595 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro29596 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
39389 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro39390 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
68603 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro68604 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
67223 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro67224 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
68077 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos (0UL) /*!< Position of ENABLE0 field. … macro68078 …#define SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Msk (0x1UL << SPIM_DMA_RX_MATCH_CONFIG_ENABLE0_Pos) /*!< …
