Home
last modified time | relevance | path

Searched refs:PWM_INTEN_SEQEND1_Disabled (Results 1 – 16 of 16) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf52810_bitfields.h5406 #define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ macro
Dnrf52811_bitfields.h5406 #define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ macro
Dnrf9160_bitfields.h9543 #define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable */ macro
Dnrf9120_bitfields.h9620 #define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable */ macro
Dnrf52_bitfields.h8849 #define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ macro
Dnrf52840_bitfields.h10568 #define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable */ macro
Dnrf52833_bitfields.h8809 #define PWM_INTEN_SEQEND1_Disabled (0UL) /*!< Disable */ macro
Dnrf5340_application_bitfields.h11223 #define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable */ macro
Dnrf54l15_types.h22006 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf54l05_types.h22006 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf54l10_types.h22006 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf54l20_enga_types.h21689 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf7120_enga_types.h29849 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf9230_engb_types.h60797 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf54h20_types.h59057 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro
Dnrf9230_enga_types.h60271 …#define PWM_INTEN_SEQEND1_Disabled (0x0UL) /*!< Disable … macro