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Searched refs:PWM_INTENSET_SEQSTARTED1_Enabled (Results 1 – 16 of 16) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf52810_bitfields.h5468 #define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ macro
Dnrf52811_bitfields.h5468 #define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ macro
Dnrf9160_bitfields.h9605 #define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled */ macro
Dnrf9120_bitfields.h9682 #define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled */ macro
Dnrf52_bitfields.h8911 #define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ macro
Dnrf52840_bitfields.h10630 #define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled */ macro
Dnrf52833_bitfields.h8871 #define PWM_INTENSET_SEQSTARTED1_Enabled (1UL) /*!< Read: Enabled */ macro
Dnrf5340_application_bitfields.h11285 #define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled */ macro
Dnrf54l15_types.h22142 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf54l05_types.h22142 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf54l10_types.h22142 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf54l20_enga_types.h21825 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf7120_enga_types.h29985 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf9230_engb_types.h60933 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf54h20_types.h59193 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro
Dnrf9230_enga_types.h60407 …#define PWM_INTENSET_SEQSTARTED1_Enabled (0x1UL) /*!< Read: Enabled … macro