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Searched refs:PWM_INTENSET_SEQSTARTED1_Disabled (Results 1 – 16 of 16) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf52810_bitfields.h5467 #define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf52811_bitfields.h5467 #define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf9160_bitfields.h9604 #define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf9120_bitfields.h9681 #define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf52_bitfields.h8910 #define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf52840_bitfields.h10629 #define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf52833_bitfields.h8870 #define PWM_INTENSET_SEQSTARTED1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf5340_application_bitfields.h11284 #define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf54l15_types.h22141 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l05_types.h22141 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l10_types.h22141 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l20_enga_types.h21824 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf7120_enga_types.h29984 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf9230_engb_types.h60932 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54h20_types.h59192 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf9230_enga_types.h60406 …#define PWM_INTENSET_SEQSTARTED1_Disabled (0x0UL) /*!< Read: Disabled … macro