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Searched refs:PWM_INTENCLR_SEQEND1_Disabled (Results 1 – 16 of 16) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf52810_bitfields.h5505 #define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf52811_bitfields.h5505 #define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf9160_bitfields.h9642 #define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf9120_bitfields.h9719 #define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf52_bitfields.h8948 #define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf52840_bitfields.h10667 #define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf52833_bitfields.h8908 #define PWM_INTENCLR_SEQEND1_Disabled (0UL) /*!< Read: Disabled */ macro
Dnrf5340_application_bitfields.h11322 #define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled */ macro
Dnrf54l15_types.h22325 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l05_types.h22325 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l10_types.h22325 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54l20_enga_types.h22008 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf7120_enga_types.h30168 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf9230_engb_types.h61116 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf54h20_types.h59376 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro
Dnrf9230_enga_types.h60590 …#define PWM_INTENCLR_SEQEND1_Disabled (0x0UL) /*!< Read: Disabled … macro