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Searched refs:NRF_SPU_S (Results 1 – 7 of 7) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dsystem_nrf5340_application.c238 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); in SystemInit()
258 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACECLK_PIN); in SystemInit()
259 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); in SystemInit()
260 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA1_PIN); in SystemInit()
261 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA2_PIN); in SystemInit()
262 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA3_PIN); in SystemInit()
326 NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1ul << SPU_RAMREGION_PERM_SECATTR_Pos); in SystemStoreFICRNS()
339 NRF_SPU_S->RAMREGION[ram_region].PERM &= in SystemLockFICRNS()
344 NRF_SPU_S->RAMREGION[ram_region].PERM |= 1ul << SPU_RAMREGION_PERM_LOCK_Pos; in SystemLockFICRNS()
Dsystem_nrf91.c202 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACECLK_PIN); in SystemInit()
203 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); in SystemInit()
204 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA1_PIN); in SystemInit()
205 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA2_PIN); in SystemInit()
206 NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA3_PIN); in SystemInit()
336 NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1ul << SPU_RAMREGION_PERM_SECATTR_Pos); in SystemStoreFICRNS()
350 NRF_SPU_S->RAMREGION[ram_region].PERM &= in SystemLockFICRNS()
355 NRF_SPU_S->RAMREGION[ram_region].PERM |= 1ul << SPU_RAMREGION_PERM_LOCK_Pos; in SystemLockFICRNS()
Dnrf9120.h3266 #define NRF_SPU_S ((NRF_SPU_Type*) NRF_SPU_S_BASE) macro
Dnrf9160.h3205 #define NRF_SPU_S ((NRF_SPU_Type*) NRF_SPU_S_BASE) macro
Dnrf5340_application.h3873 #define NRF_SPU_S ((NRF_SPU_Type*) NRF_SPU_S_BASE) macro
/hal_nordic-latest/nrfx/templates/
Dnrfx_config_nrf91.h162 #define NRF_SPU NRF_SPU_S
Dnrfx_config_nrf5340_application.h196 #define NRF_SPU NRF_SPU_S