1 /*
2 * Copyright (c) 2023 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_PPIB_H__
35 #define NRF_PPIB_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /*
44 * Macro for generating if statement code blocks that allow extracting
45 * the number of channels associated with the specific PPIB instance.
46 */
47 #define NRF_INTERNAL_PPIB_CHAN_NUM_EXTRACT(chan_num, p_reg) \
48 if (0) {} \
49 NRFX_FOREACH_PRESENT(PPIB, NRF_INTERNAL_ELSE_IF_EXTRACT_1, (), (), chan_num, _NTASKSEVENTS_MAX + 1, p_reg) \
50 else \
51 { \
52 chan_num = 0; \
53 }
54
55 /**
56 * @defgroup nrf_ppib_hal PPIB HAL
57 * @{
58 * @ingroup nrf_ppib
59 * @brief Hardware access layer for managing the PPI Bridge (PPIB) peripheral.
60 */
61
62 /** @brief Number of send tasks. */
63 #define NRF_PPIB_TASKS_SEND_COUNT PPIB_TASKS_SEND_MaxCount
64
65 /** @brief Number of receive events. */
66 #define NRF_PPIB_EVENTS_RECEIVE_COUNT PPIB_EVENTS_RECEIVE_MaxCount
67
68 /** @brief PPIB tasks. */
69 typedef enum
70 {
71 NRF_PPIB_TASK_SEND_0 = offsetof(NRF_PPIB_Type, TASKS_SEND[0]), /**< Send 0 task. */
72 NRF_PPIB_TASK_SEND_1 = offsetof(NRF_PPIB_Type, TASKS_SEND[1]), /**< Send 1 task. */
73 NRF_PPIB_TASK_SEND_2 = offsetof(NRF_PPIB_Type, TASKS_SEND[2]), /**< Send 2 task. */
74 NRF_PPIB_TASK_SEND_3 = offsetof(NRF_PPIB_Type, TASKS_SEND[3]), /**< Send 3 task. */
75 NRF_PPIB_TASK_SEND_4 = offsetof(NRF_PPIB_Type, TASKS_SEND[4]), /**< Send 4 task. */
76 NRF_PPIB_TASK_SEND_5 = offsetof(NRF_PPIB_Type, TASKS_SEND[5]), /**< Send 5 task. */
77 NRF_PPIB_TASK_SEND_6 = offsetof(NRF_PPIB_Type, TASKS_SEND[6]), /**< Send 6 task. */
78 NRF_PPIB_TASK_SEND_7 = offsetof(NRF_PPIB_Type, TASKS_SEND[7]), /**< Send 7 task. */
79 NRF_PPIB_TASK_SEND_8 = offsetof(NRF_PPIB_Type, TASKS_SEND[8]), /**< Send 8 task. */
80 NRF_PPIB_TASK_SEND_9 = offsetof(NRF_PPIB_Type, TASKS_SEND[9]), /**< Send 9 task. */
81 NRF_PPIB_TASK_SEND_10 = offsetof(NRF_PPIB_Type, TASKS_SEND[10]), /**< Send 10 task. */
82 NRF_PPIB_TASK_SEND_11 = offsetof(NRF_PPIB_Type, TASKS_SEND[11]), /**< Send 11 task. */
83 NRF_PPIB_TASK_SEND_12 = offsetof(NRF_PPIB_Type, TASKS_SEND[12]), /**< Send 12 task. */
84 NRF_PPIB_TASK_SEND_13 = offsetof(NRF_PPIB_Type, TASKS_SEND[13]), /**< Send 13 task. */
85 NRF_PPIB_TASK_SEND_14 = offsetof(NRF_PPIB_Type, TASKS_SEND[14]), /**< Send 14 task. */
86 NRF_PPIB_TASK_SEND_15 = offsetof(NRF_PPIB_Type, TASKS_SEND[15]), /**< Send 15 task. */
87 NRF_PPIB_TASK_SEND_16 = offsetof(NRF_PPIB_Type, TASKS_SEND[16]), /**< Send 16 task. */
88 NRF_PPIB_TASK_SEND_17 = offsetof(NRF_PPIB_Type, TASKS_SEND[17]), /**< Send 17 task. */
89 NRF_PPIB_TASK_SEND_18 = offsetof(NRF_PPIB_Type, TASKS_SEND[18]), /**< Send 18 task. */
90 NRF_PPIB_TASK_SEND_19 = offsetof(NRF_PPIB_Type, TASKS_SEND[19]), /**< Send 19 task. */
91 NRF_PPIB_TASK_SEND_20 = offsetof(NRF_PPIB_Type, TASKS_SEND[20]), /**< Send 20 task. */
92 NRF_PPIB_TASK_SEND_21 = offsetof(NRF_PPIB_Type, TASKS_SEND[21]), /**< Send 21 task. */
93 NRF_PPIB_TASK_SEND_22 = offsetof(NRF_PPIB_Type, TASKS_SEND[22]), /**< Send 22 task. */
94 NRF_PPIB_TASK_SEND_23 = offsetof(NRF_PPIB_Type, TASKS_SEND[23]), /**< Send 23 task. */
95 NRF_PPIB_TASK_SEND_24 = offsetof(NRF_PPIB_Type, TASKS_SEND[24]), /**< Send 24 task. */
96 NRF_PPIB_TASK_SEND_25 = offsetof(NRF_PPIB_Type, TASKS_SEND[25]), /**< Send 25 task. */
97 NRF_PPIB_TASK_SEND_26 = offsetof(NRF_PPIB_Type, TASKS_SEND[26]), /**< Send 26 task. */
98 NRF_PPIB_TASK_SEND_27 = offsetof(NRF_PPIB_Type, TASKS_SEND[27]), /**< Send 27 task. */
99 NRF_PPIB_TASK_SEND_28 = offsetof(NRF_PPIB_Type, TASKS_SEND[28]), /**< Send 28 task. */
100 NRF_PPIB_TASK_SEND_29 = offsetof(NRF_PPIB_Type, TASKS_SEND[29]), /**< Send 29 task. */
101 NRF_PPIB_TASK_SEND_30 = offsetof(NRF_PPIB_Type, TASKS_SEND[30]), /**< Send 30 task. */
102 NRF_PPIB_TASK_SEND_31 = offsetof(NRF_PPIB_Type, TASKS_SEND[31]), /**< Send 31 task. */
103 } nrf_ppib_task_t;
104
105 /** @brief PPIB events. */
106 typedef enum
107 {
108 NRF_PPIB_EVENT_RECEIVE_0 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[0]), /**< Receive 0 event. */
109 NRF_PPIB_EVENT_RECEIVE_1 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[1]), /**< Receive 1 event. */
110 NRF_PPIB_EVENT_RECEIVE_2 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[2]), /**< Receive 2 event. */
111 NRF_PPIB_EVENT_RECEIVE_3 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[3]), /**< Receive 3 event. */
112 NRF_PPIB_EVENT_RECEIVE_4 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[4]), /**< Receive 4 event. */
113 NRF_PPIB_EVENT_RECEIVE_5 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[5]), /**< Receive 5 event. */
114 NRF_PPIB_EVENT_RECEIVE_6 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[6]), /**< Receive 6 event. */
115 NRF_PPIB_EVENT_RECEIVE_7 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[7]), /**< Receive 7 event. */
116 NRF_PPIB_EVENT_RECEIVE_8 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[8]), /**< Receive 8 event. */
117 NRF_PPIB_EVENT_RECEIVE_9 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[9]), /**< Receive 9 event. */
118 NRF_PPIB_EVENT_RECEIVE_10 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[10]), /**< Receive 10 event. */
119 NRF_PPIB_EVENT_RECEIVE_11 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[11]), /**< Receive 11 event. */
120 NRF_PPIB_EVENT_RECEIVE_12 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[12]), /**< Receive 12 event. */
121 NRF_PPIB_EVENT_RECEIVE_13 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[13]), /**< Receive 13 event. */
122 NRF_PPIB_EVENT_RECEIVE_14 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[14]), /**< Receive 14 event. */
123 NRF_PPIB_EVENT_RECEIVE_15 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[15]), /**< Receive 15 event. */
124 NRF_PPIB_EVENT_RECEIVE_16 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[16]), /**< Receive 16 event. */
125 NRF_PPIB_EVENT_RECEIVE_17 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[17]), /**< Receive 17 event. */
126 NRF_PPIB_EVENT_RECEIVE_18 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[18]), /**< Receive 18 event. */
127 NRF_PPIB_EVENT_RECEIVE_19 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[19]), /**< Receive 19 event. */
128 NRF_PPIB_EVENT_RECEIVE_20 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[20]), /**< Receive 20 event. */
129 NRF_PPIB_EVENT_RECEIVE_21 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[21]), /**< Receive 21 event. */
130 NRF_PPIB_EVENT_RECEIVE_22 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[22]), /**< Receive 22 event. */
131 NRF_PPIB_EVENT_RECEIVE_23 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[23]), /**< Receive 23 event. */
132 NRF_PPIB_EVENT_RECEIVE_24 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[24]), /**< Receive 24 event. */
133 NRF_PPIB_EVENT_RECEIVE_25 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[25]), /**< Receive 25 event. */
134 NRF_PPIB_EVENT_RECEIVE_26 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[26]), /**< Receive 26 event. */
135 NRF_PPIB_EVENT_RECEIVE_27 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[27]), /**< Receive 27 event. */
136 NRF_PPIB_EVENT_RECEIVE_28 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[28]), /**< Receive 28 event. */
137 NRF_PPIB_EVENT_RECEIVE_29 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[29]), /**< Receive 29 event. */
138 NRF_PPIB_EVENT_RECEIVE_30 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[30]), /**< Receive 30 event. */
139 NRF_PPIB_EVENT_RECEIVE_31 = offsetof(NRF_PPIB_Type, EVENTS_RECEIVE[31]), /**< Receive 31 event. */
140 } nrf_ppib_event_t;
141
142 #if defined(__GNUC__)
143 #pragma GCC diagnostic push
144 #pragma GCC diagnostic ignored "-Wpedantic"
145 #endif
146
147 /** @brief Send task mask. */
148 typedef enum
149 {
150 NRF_PPIB_SEND_0_MASK = PPIB_OVERFLOW_SEND_SEND0_Msk, /* Send task 0 mask. */
151 NRF_PPIB_SEND_1_MASK = PPIB_OVERFLOW_SEND_SEND1_Msk, /* Send task 1 mask. */
152 NRF_PPIB_SEND_2_MASK = PPIB_OVERFLOW_SEND_SEND2_Msk, /* Send task 2 mask. */
153 NRF_PPIB_SEND_3_MASK = PPIB_OVERFLOW_SEND_SEND3_Msk, /* Send task 3 mask. */
154 NRF_PPIB_SEND_4_MASK = PPIB_OVERFLOW_SEND_SEND4_Msk, /* Send task 4 mask. */
155 NRF_PPIB_SEND_5_MASK = PPIB_OVERFLOW_SEND_SEND5_Msk, /* Send task 5 mask. */
156 NRF_PPIB_SEND_6_MASK = PPIB_OVERFLOW_SEND_SEND6_Msk, /* Send task 6 mask. */
157 NRF_PPIB_SEND_7_MASK = PPIB_OVERFLOW_SEND_SEND7_Msk, /* Send task 7 mask. */
158 NRF_PPIB_SEND_8_MASK = PPIB_OVERFLOW_SEND_SEND8_Msk, /* Send task 8 mask. */
159 NRF_PPIB_SEND_9_MASK = PPIB_OVERFLOW_SEND_SEND9_Msk, /* Send task 9 mask. */
160 NRF_PPIB_SEND_10_MASK = PPIB_OVERFLOW_SEND_SEND10_Msk, /* Send task 10 mask. */
161 NRF_PPIB_SEND_11_MASK = PPIB_OVERFLOW_SEND_SEND11_Msk, /* Send task 11 mask. */
162 NRF_PPIB_SEND_12_MASK = PPIB_OVERFLOW_SEND_SEND12_Msk, /* Send task 12 mask. */
163 NRF_PPIB_SEND_13_MASK = PPIB_OVERFLOW_SEND_SEND13_Msk, /* Send task 13 mask. */
164 NRF_PPIB_SEND_14_MASK = PPIB_OVERFLOW_SEND_SEND14_Msk, /* Send task 14 mask. */
165 NRF_PPIB_SEND_15_MASK = PPIB_OVERFLOW_SEND_SEND15_Msk, /* Send task 15 mask. */
166 NRF_PPIB_SEND_16_MASK = PPIB_OVERFLOW_SEND_SEND16_Msk, /* Send task 16 mask. */
167 NRF_PPIB_SEND_17_MASK = PPIB_OVERFLOW_SEND_SEND17_Msk, /* Send task 17 mask. */
168 NRF_PPIB_SEND_18_MASK = PPIB_OVERFLOW_SEND_SEND18_Msk, /* Send task 18 mask. */
169 NRF_PPIB_SEND_19_MASK = PPIB_OVERFLOW_SEND_SEND19_Msk, /* Send task 19 mask. */
170 NRF_PPIB_SEND_20_MASK = PPIB_OVERFLOW_SEND_SEND20_Msk, /* Send task 20 mask. */
171 NRF_PPIB_SEND_21_MASK = PPIB_OVERFLOW_SEND_SEND21_Msk, /* Send task 21 mask. */
172 NRF_PPIB_SEND_22_MASK = PPIB_OVERFLOW_SEND_SEND22_Msk, /* Send task 22 mask. */
173 NRF_PPIB_SEND_23_MASK = PPIB_OVERFLOW_SEND_SEND23_Msk, /* Send task 23 mask. */
174 NRF_PPIB_SEND_24_MASK = PPIB_OVERFLOW_SEND_SEND24_Msk, /* Send task 24 mask. */
175 NRF_PPIB_SEND_25_MASK = PPIB_OVERFLOW_SEND_SEND25_Msk, /* Send task 25 mask. */
176 NRF_PPIB_SEND_26_MASK = PPIB_OVERFLOW_SEND_SEND26_Msk, /* Send task 26 mask. */
177 NRF_PPIB_SEND_27_MASK = PPIB_OVERFLOW_SEND_SEND27_Msk, /* Send task 27 mask. */
178 NRF_PPIB_SEND_28_MASK = PPIB_OVERFLOW_SEND_SEND28_Msk, /* Send task 28 mask. */
179 NRF_PPIB_SEND_29_MASK = PPIB_OVERFLOW_SEND_SEND29_Msk, /* Send task 29 mask. */
180 NRF_PPIB_SEND_30_MASK = PPIB_OVERFLOW_SEND_SEND30_Msk, /* Send task 30 mask. */
181 NRF_PPIB_SEND_31_MASK = PPIB_OVERFLOW_SEND_SEND31_Msk, /* Send task 31 mask. */
182 } nrf_ppib_send_mask_t;
183
184 #if defined(__GNUC__)
185 #pragma GCC diagnostic pop
186 #endif
187
188 /**
189 * @brief Function for getting the total number of available channels for the given PPIB instance.
190 *
191 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
192 *
193 * @return Number of available channels.
194 */
195 NRF_STATIC_INLINE uint8_t nrf_ppib_channel_number_get(NRF_PPIB_Type const * p_reg);
196
197 /**
198 * @brief Function for returning the specified PPIB SEND task.
199 *
200 * @param[in] index Task index.
201 *
202 * @return The specified PPIB SEND task.
203 */
204 NRF_STATIC_INLINE nrf_ppib_task_t nrf_ppib_send_task_get(uint8_t index);
205
206 /**
207 * @brief Function for getting the address of the specified PPIB task.
208 *
209 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
210 * @param[in] task Task.
211 *
212 * @return Address of the specified task.
213 */
214 NRF_STATIC_INLINE uint32_t nrf_ppib_task_address_get(NRF_PPIB_Type const * p_reg,
215 nrf_ppib_task_t task);
216
217 /**
218 * @brief Function for returning the specified PPIB RECEIVE event.
219 *
220 * @param[in] index Event index.
221 *
222 * @return The specified PPIB RECEIVE event.
223 */
224 NRF_STATIC_INLINE nrf_ppib_event_t nrf_ppib_receive_event_get(uint8_t index);
225
226 /**
227 * @brief Function for getting the address of the specified PPIB event.
228 *
229 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
230 * @param[in] event Event.
231 *
232 * @return Address of the specified event.
233 */
234 NRF_STATIC_INLINE uint32_t nrf_ppib_event_address_get(NRF_PPIB_Type const * p_reg,
235 nrf_ppib_event_t event);
236
237 /**
238 * @brief Function for setting the subscribe configuration for a given task.
239 *
240 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
241 * @param[in] task Task for which to set the configuration.
242 * @param[in] channel PPIB channel through which to subscribe events.
243 */
244 NRF_STATIC_INLINE void nrf_ppib_subscribe_set(NRF_PPIB_Type * p_reg,
245 nrf_ppib_task_t task,
246 uint8_t channel);
247
248 /**
249 * @brief Function for clearing the subscribe configuration for a given task.
250 *
251 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
252 * @param[in] task Task for which to clear the configuration.
253 */
254 NRF_STATIC_INLINE void nrf_ppib_subscribe_clear(NRF_PPIB_Type * p_reg, nrf_ppib_task_t task);
255
256 /**
257 * @brief Function for setting the publish configuration for a given event.
258 *
259 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
260 * @param[in] event Event for which to set the configuration.
261 * @param[in] channel PPIB channel through which to publish the event.
262 */
263 NRF_STATIC_INLINE void nrf_ppib_publish_set(NRF_PPIB_Type * p_reg,
264 nrf_ppib_event_t event,
265 uint8_t channel);
266
267 /**
268 * @brief Function for clearing the publish configuration for a given event.
269 *
270 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
271 * @param[in] event Event for which to clear the configuration.
272 */
273 NRF_STATIC_INLINE void nrf_ppib_publish_clear(NRF_PPIB_Type * p_reg, nrf_ppib_event_t event);
274
275 /**
276 * @brief Function for getting the task oveflow register for SEND tasks.
277 * Task overflow mask is cleared after reading.
278 *
279 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
280 *
281 * @return Mask of SEND tasks overflow, constructed with @ref nrf_ppib_send_mask_t.
282 */
283 NRF_STATIC_INLINE uint32_t nrf_ppib_overflow_get_and_clear(NRF_PPIB_Type * p_reg);
284
285 /**
286 * @brief Function for retrieving the state of overflow for a given SEND task.
287 *
288 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
289 * @param[in] index SEND task index to be checked for overflow.
290 *
291 * @retval true The overflow has happened.
292 * @retval false The overflow has not happened.
293 */
294 NRF_STATIC_INLINE bool nrf_ppib_overflow_check(NRF_PPIB_Type const * p_reg, uint8_t index);
295
296 #ifndef NRF_DECLARE_ONLY
297
nrf_ppib_channel_number_get(NRF_PPIB_Type const * p_reg)298 NRF_STATIC_INLINE uint8_t nrf_ppib_channel_number_get(NRF_PPIB_Type const * p_reg)
299 {
300 (void)p_reg;
301
302 uint8_t chan_num = 0;
303 NRF_INTERNAL_PPIB_CHAN_NUM_EXTRACT(chan_num, p_reg);
304 return chan_num;
305 }
306
nrf_ppib_send_task_get(uint8_t index)307 NRF_STATIC_INLINE nrf_ppib_task_t nrf_ppib_send_task_get(uint8_t index)
308 {
309 NRFX_ASSERT(index < NRF_PPIB_TASKS_SEND_COUNT);
310 return (nrf_ppib_task_t)NRFX_OFFSETOF(NRF_PPIB_Type, TASKS_SEND[index]);
311 }
312
nrf_ppib_task_address_get(NRF_PPIB_Type const * p_reg,nrf_ppib_task_t task)313 NRF_STATIC_INLINE uint32_t nrf_ppib_task_address_get(NRF_PPIB_Type const * p_reg,
314 nrf_ppib_task_t task)
315 {
316 return ((uint32_t)p_reg + task);
317 }
318
nrf_ppib_receive_event_get(uint8_t index)319 NRF_STATIC_INLINE nrf_ppib_event_t nrf_ppib_receive_event_get(uint8_t index)
320 {
321 NRFX_ASSERT(index < NRF_PPIB_EVENTS_RECEIVE_COUNT);
322 return (nrf_ppib_event_t)NRFX_OFFSETOF(NRF_PPIB_Type, EVENTS_RECEIVE[index]);
323 }
324
nrf_ppib_event_address_get(NRF_PPIB_Type const * p_reg,nrf_ppib_event_t event)325 NRF_STATIC_INLINE uint32_t nrf_ppib_event_address_get(NRF_PPIB_Type const * p_reg,
326 nrf_ppib_event_t event)
327 {
328 return ((uint32_t)p_reg + event);
329 }
330
nrf_ppib_subscribe_set(NRF_PPIB_Type * p_reg,nrf_ppib_task_t task,uint8_t channel)331 NRF_STATIC_INLINE void nrf_ppib_subscribe_set(NRF_PPIB_Type * p_reg,
332 nrf_ppib_task_t task,
333 uint8_t channel)
334 {
335 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80UL)) =
336 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
337 }
338
nrf_ppib_subscribe_clear(NRF_PPIB_Type * p_reg,nrf_ppib_task_t task)339 NRF_STATIC_INLINE void nrf_ppib_subscribe_clear(NRF_PPIB_Type * p_reg,
340 nrf_ppib_task_t task)
341 {
342 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80UL)) = 0;
343 }
344
nrf_ppib_publish_set(NRF_PPIB_Type * p_reg,nrf_ppib_event_t event,uint8_t channel)345 NRF_STATIC_INLINE void nrf_ppib_publish_set(NRF_PPIB_Type * p_reg,
346 nrf_ppib_event_t event,
347 uint8_t channel)
348 {
349 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80UL)) =
350 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
351 }
352
nrf_ppib_publish_clear(NRF_PPIB_Type * p_reg,nrf_ppib_event_t event)353 NRF_STATIC_INLINE void nrf_ppib_publish_clear(NRF_PPIB_Type * p_reg,
354 nrf_ppib_event_t event)
355 {
356 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80UL)) = 0;
357 }
358
nrf_ppib_overflow_get_and_clear(NRF_PPIB_Type * p_reg)359 NRF_STATIC_INLINE uint32_t nrf_ppib_overflow_get_and_clear(NRF_PPIB_Type * p_reg)
360 {
361 uint32_t overflow_mask = p_reg->OVERFLOW.SEND;
362 p_reg->OVERFLOW.SEND = ~overflow_mask;
363 return overflow_mask;
364 }
365
nrf_ppib_overflow_check(NRF_PPIB_Type const * p_reg,uint8_t index)366 NRF_STATIC_INLINE bool nrf_ppib_overflow_check(NRF_PPIB_Type const * p_reg, uint8_t index)
367 {
368 NRFX_ASSERT(index < NRF_PPIB_TASKS_SEND_COUNT);
369 return (bool)((p_reg->OVERFLOW.SEND >> index) & 0x1UL);
370 }
371
372 #endif // NRF_DECLARE_ONLY
373
374 /** @} */
375
376 #ifdef __cplusplus
377 }
378 #endif
379
380 #endif
381
