Home
last modified time | relevance | path

Searched refs:NRFX_CHECK (Results 1 – 25 of 59) sorted by relevance

123

/hal_nordic-latest/nrfx/drivers/src/prs/
Dnrfx_prs.c36 #if NRFX_CHECK(NRFX_PRS_ENABLED)
61 #if defined(NRFX_PRS_BOX_0_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED)
64 #if defined(NRFX_PRS_BOX_1_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED)
67 #if defined(NRFX_PRS_BOX_2_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED)
70 #if defined(NRFX_PRS_BOX_3_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED)
73 #if defined(NRFX_PRS_BOX_4_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED)
76 #if defined(NRFX_PRS_BOX_5_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_5_ENABLED)
79 #if defined(NRFX_PRS_BOX_6_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_6_ENABLED)
82 #if defined(NRFX_PRS_BOX_7_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_7_ENABLED)
85 #if defined(NRFX_PRS_BOX_8_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_8_ENABLED)
[all …]
/hal_nordic-latest/nrfx/drivers/src/
Dnrfx_ppib.c36 #if NRFX_CHECK(NRFX_PPIB_ENABLED)
141 #if NRFX_CHECK(NRFX_PPIB00_ENABLED) && NRFX_CHECK(NRFX_PPIB10_ENABLED)
144 #if NRFX_CHECK(NRFX_PPIB01_ENABLED) && NRFX_CHECK(NRFX_PPIB20_ENABLED)
147 #if NRFX_CHECK(NRFX_PPIB11_ENABLED) && NRFX_CHECK(NRFX_PPIB21_ENABLED)
150 #if NRFX_CHECK(NRFX_PPIB22_ENABLED) && NRFX_CHECK(NRFX_PPIB30_ENABLED)
155 #if NRFX_CHECK(NRFX_PPIB02_ENABLED) && NRFX_CHECK(NRFX_PPIB03_ENABLED)
158 #if NRFX_CHECK(NRFX_PPIB04_ENABLED) && NRFX_CHECK(NRFX_PPIB12_ENABLED)
163 #if NRFX_CHECK(NRFX_PPIB020_ENABLED) && NRFX_CHECK(NRFX_PPIB030_ENABLED)
Dnrfx_clock.c36 #if NRFX_CHECK(NRFX_CLOCK_ENABLED)
44 #if NRFX_CHECK(NRFX_POWER_ENABLED)
56 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
111 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED) && \
122 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && !NRF_CLOCK_HAS_CALIBRATION_TIMER
126 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
139 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
143 #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
147 #if NRFX_CHECK(NRF_CLOCK_HAS_XO_TUNE)
158 #if NRFX_CHECK(NRFX_POWER_ENABLED)
[all …]
Dnrfx_nfct.c36 #if NRFX_CHECK(NRFX_NFCT_ENABLED)
57 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79) || NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
61 #if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER)
67 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
71 #elif NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
76 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190)
79 #elif NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_79)
211 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190) in nfct_field_event_handler()
233 #if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER) in nfct_field_event_handler()
234 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190) in nfct_field_event_handler()
[all …]
Dnrfx_egu.c36 #if NRFX_CHECK(NRFX_EGU_ENABLED)
42 #if NRFX_CHECK(NRFX_EGU0_ENABLED) && ((1 << 0) & NRFX_EGUS_USED)
45 #if NRFX_CHECK(NRFX_EGU1_ENABLED) && ((1 << 1) & NRFX_EGUS_USED)
48 #if NRFX_CHECK(NRFX_EGU2_ENABLED) && ((1 << 2) & NRFX_EGUS_USED)
51 #if NRFX_CHECK(NRFX_EGU3_ENABLED) && ((1 << 3) & NRFX_EGUS_USED)
54 #if NRFX_CHECK(NRFX_EGU4_ENABLED) && ((1 << 4) & NRFX_EGUS_USED)
57 #if NRFX_CHECK(NRFX_EGU5_ENABLED) && ((1 << 5) & NRFX_EGUS_USED)
Dnrfx_spim.c36 #if NRFX_CHECK(NRFX_SPIM_ENABLED)
48 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) && !NRFY_SPIM_HAS_EXTENDED
110 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
144 defined(NRF52840_XXAA) && NRFX_CHECK(NRFX_SPIM3_ENABLED)
149 #if NRFX_CHECK(NRF54L_ERRATA_8_PRESENT) || NRFX_CHECK(NRF54H_ERRATA_212_PRESENT)
176 #if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
310 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) in configure_pins()
414 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) in spim_configuration_verify()
470 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) in spim_configure()
508 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) in spim_configure()
[all …]
Dnrfx_wdt.c36 #if NRFX_CHECK(NRFX_WDT_ENABLED)
52 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
82 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) in wdt_configure()
111 #if NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) in wdt_init()
196 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) in nrfx_wdt_uninit()
296 #if NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) in nrfx_wdt_stop()
307 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
Dnrfx_timer.c36 #if NRFX_CHECK(NRFX_TIMER_ENABLED)
42 #if NRFX_CHECK(NRFX_TIMER0_ENABLED) && ((1 << 0) & NRFX_TIMERS_USED)
45 #if NRFX_CHECK(NRFX_TIMER1_ENABLED) && ((1 << 1) & NRFX_TIMERS_USED)
48 #if NRFX_CHECK(NRFX_TIMER2_ENABLED) && ((1 << 2) & NRFX_TIMERS_USED)
51 #if NRFX_CHECK(NRFX_TIMER3_ENABLED) && ((1 << 3) & NRFX_TIMERS_USED)
54 #if NRFX_CHECK(NRFX_TIMER4_ENABLED) && ((1 << 4) & NRFX_TIMERS_USED)
Dnrfx_power.c36 #if NRFX_CHECK(NRFX_POWER_ENABLED)
40 #if NRFX_CHECK(NRFX_CLOCK_ENABLED)
152 #if NRFX_CHECK(NRFX_CLOCK_ENABLED) in nrfx_power_uninit()
417 #if NRFX_CHECK(NRFX_CLOCK_ENABLED)
Dnrfx_twi_twim.c36 #if NRFX_CHECK(NRFX_TWI_ENABLED) || NRFX_CHECK(NRFX_TWIM_ENABLED)
Dnrfx_twim.c36 #if NRFX_CHECK(NRFX_TWIM_ENABLED)
105 #if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
286 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_twim_init()
312 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_twim_init()
319 #if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) in nrfx_twim_init()
372 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_twim_uninit()
588 #if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) in twim_xfer()
683 #if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) in irq_handler()
775 #if NRFX_CHECK(NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) in irq_handler()
Dnrfx_spis.c36 #if NRFX_CHECK(NRFX_SPIS_ENABLED)
60 #if NRFX_CHECK(NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
279 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_spis_init()
314 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_spis_init()
342 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_spis_init()
439 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_spis_uninit()
Dnrfx_comp.c36 #if NRFX_CHECK(NRFX_COMP_ENABLED)
125 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_comp_init()
197 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_comp_uninit()
Dnrfx_lpcomp.c36 #if NRFX_CHECK(NRFX_LPCOMP_ENABLED)
148 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_lpcomp_init()
223 #if NRFX_CHECK(NRFX_PRS_ENABLED) in nrfx_lpcomp_uninit()
Dnrfx_temp.c36 #if NRFX_CHECK(NRFX_TEMP_ENABLED)
67 #if NRFX_CHECK(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY) in nrfx_temp_init()
Dnrfx_i2s.c36 #if NRFX_CHECK(NRFX_I2S_ENABLED)
146 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_170) in deconfigure_pins()
317 #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_196) in nrfx_i2s_uninit()
521 #if NRFX_CHECK(USE_WORKAROUND_FOR_I2S_STOP_ANOMALY) in nrfx_i2s_stop()
/hal_nordic-latest/nrfx/drivers/include/
Dnrfx_ppib.h71 #if NRFX_CHECK(NRFX_PPIB00_ENABLED) && NRFX_CHECK(NRFX_PPIB10_ENABLED)
74 #if NRFX_CHECK(NRFX_PPIB01_ENABLED) && NRFX_CHECK(NRFX_PPIB20_ENABLED)
77 #if NRFX_CHECK(NRFX_PPIB11_ENABLED) && NRFX_CHECK(NRFX_PPIB21_ENABLED)
80 #if NRFX_CHECK(NRFX_PPIB22_ENABLED) && NRFX_CHECK(NRFX_PPIB30_ENABLED)
85 #if NRFX_CHECK(NRFX_PPIB02_ENABLED) && NRFX_CHECK(NRFX_PPIB03_ENABLED)
88 #if NRFX_CHECK(NRFX_PPIB04_ENABLED) && NRFX_CHECK(NRFX_PPIB12_ENABLED)
93 #if NRFX_CHECK(NRFX_PPIB020_ENABLED) && NRFX_CHECK(NRFX_PPIB030_ENABLED)
Dnrfx_power_clock.h47 #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED) in nrfx_power_clock_irq_init()
52 #elif NRFX_CHECK(NRFX_POWER_ENABLED) in nrfx_power_clock_irq_init()
54 #elif NRFX_CHECK(NRFX_CLOCK_ENABLED) in nrfx_power_clock_irq_init()
72 #if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
74 #elif NRFX_CHECK(NRFX_POWER_ENABLED)
76 #elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
Dnrfx_wdt.h63 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__)
127 #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__)
Dnrfx_clock.h238 #if (NRF_CLOCK_HAS_CALIBRATION && NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)) || \
297 #if (NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED)) || \
Dnrfx_spim.h102 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
374 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
/hal_nordic-latest/nrfx/helpers/
Dnrfx_ids.h82 #if NRFX_CHECK(NRFX_IPC_ENABLED)
87 #if NRFX_CHECK(NRFX_VEVIF_ENABLED)
91 #if NRFX_CHECK(NRFX_BELLBOARD0_ENABLED)
94 #if NRFX_CHECK(NRFX_BELLBOARD1_ENABLED)
97 #if NRFX_CHECK(NRFX_BELLBOARD2_ENABLED)
100 #if NRFX_CHECK(NRFX_BELLBOARD3_ENABLED)
335 #if NRFX_CHECK(NRFX_IPC_ENABLED)
340 #if NRFX_CHECK(NRFX_VEVIF_ENABLED)
375 #if NRFX_CHECK(NRFX_BELLBOARD0_ENABLED)
378 #if NRFX_CHECK(NRFX_BELLBOARD1_ENABLED)
[all …]
Dnrfx_gppi_ppi.c36 #if NRFX_CHECK(NRFX_PPI_ENABLED)
170 #if NRFX_CHECK(NRFX_PPI_ENABLED) in nrfx_gppi_channel_alloc()
180 #if NRFX_CHECK(NRFX_PPI_ENABLED) in nrfx_gppi_channel_free()
190 #if NRFX_CHECK(NRFX_PPI_ENABLED) in nrfx_gppi_group_alloc()
200 #if NRFX_CHECK(NRFX_PPI_ENABLED) in nrfx_gppi_group_free()
Dnrfx_gppi_dppi.c36 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1))
174 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1)) in nrfx_gppi_channel_alloc()
188 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1)) in nrfx_gppi_channel_free()
202 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1)) in nrfx_gppi_group_alloc()
216 #if NRFX_CHECK(NRFX_DPPI_ENABLED) && (!defined(DPPIC_COUNT) || (DPPIC_COUNT == 1)) in nrfx_gppi_group_free()
/hal_nordic-latest/nrfx/soc/
Dnrfx_coredep.h38 #if NRFX_CHECK(ISA_RISCV)
109 #if NRFX_CHECK(NRFX_DELAY_DWT_BASED)
154 #if NRFX_CHECK(ISA_ARM) in nrfx_coredep_delay_us()
187 #elif NRFX_CHECK(ISA_RISCV) in nrfx_coredep_delay_us()
188 #if !NRFX_CHECK(NRFX_COREDEP_VPR_LEGACY) in nrfx_coredep_delay_us()

123