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Searched refs:GPIO_LATCH_PIN0_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf52805_bitfields.h3586 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
3587 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52810_bitfields.h3869 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
3870 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52811_bitfields.h3869 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
3870 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf5340_network_bitfields.h5827 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
5828 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52820_bitfields.h3680 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
3681 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf9160_bitfields.h8704 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
8705 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf9120_bitfields.h8739 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
8740 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52_bitfields.h7219 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
7220 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52840_bitfields.h8396 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
8397 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf52833_bitfields.h6646 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
6647 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf5340_application_bitfields.h10428 #define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. */ macro
10429 #define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. */
Dnrf54l09_enga_types.h12032 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
12033 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf54l15_types.h11742 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
11743 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf54l05_types.h11742 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
11743 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf54l10_types.h11742 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
11743 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf54l20_enga_types.h12202 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
12203 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf7120_enga_types.h13662 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
13663 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf9230_engb_types.h21273 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
21274 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf54h20_types.h21438 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
21439 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …
Dnrf9230_enga_types.h20747 …#define GPIO_LATCH_PIN0_Pos (0UL) /*!< Position of PIN0 field. … macro
20748 …#define GPIO_LATCH_PIN0_Msk (0x1UL << GPIO_LATCH_PIN0_Pos) /*!< Bit mask of PIN0 field. …