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Searched refs:ETM_TRCVIPCSSCTLR_START0_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf54l09_enga_types.h8362 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
8363 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf54l15_types.h8065 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
8066 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf54l05_types.h8065 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
8066 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf54l10_types.h8065 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
8066 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf54l20_enga_types.h8532 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
8533 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf7120_enga_types.h10005 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
10006 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf9230_engb_types.h14862 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
14863 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf54h20_types.h15254 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
15255 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…
Dnrf9230_enga_types.h14336 …#define ETM_TRCVIPCSSCTLR_START0_Pos (0UL) /*!< Position of START0 field. … macro
14337 …#define ETM_TRCVIPCSSCTLR_START0_Msk (0x1UL << ETM_TRCVIPCSSCTLR_START0_Pos) /*!< Bit mask of STAR…