Searched refs:ETM_TRCVICTLR_EVENT_SEL_Pos (Results 1 – 11 of 11) sorted by relevance
4529 #define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. */ macro4530 #define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT_…
4565 #define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. */ macro4566 #define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT_…
7855 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro7856 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
7558 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro7559 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
8025 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro8026 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
9498 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro9499 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
14355 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro14356 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
14747 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro14748 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
13829 …#define ETM_TRCVICTLR_EVENT_SEL_Pos (0UL) /*!< Position of EVENT_SEL field. … macro13830 …#define ETM_TRCVICTLR_EVENT_SEL_Msk (0x1FUL << ETM_TRCVICTLR_EVENT_SEL_Pos) /*!< Bit mask of EVENT…
