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Searched refs:ETM_TRCVDCTLR_EVENT5_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf54l09_enga_types.h8575 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
8576 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf54l15_types.h8278 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
8279 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf54l05_types.h8278 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
8279 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf54l10_types.h8278 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
8279 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf54l20_enga_types.h8745 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
8746 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf7120_enga_types.h10218 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
10219 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf9230_engb_types.h15075 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
15076 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf54h20_types.h15467 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
15468 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…
Dnrf9230_enga_types.h14549 …#define ETM_TRCVDCTLR_EVENT5_Pos (5UL) /*!< Position of EVENT5 field. … macro
14550 …#define ETM_TRCVDCTLR_EVENT5_Msk (0x1UL << ETM_TRCVDCTLR_EVENT5_Pos) /*!< Bit mask of EVENT5 field…