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Searched refs:ETM_TRCVDCTLR_EVENT4_Pos (Results 1 – 9 of 9) sorted by relevance

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Dnrf54l09_enga_types.h8567 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
8568 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf54l15_types.h8270 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
8271 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf54l05_types.h8270 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
8271 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf54l10_types.h8270 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
8271 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf54l20_enga_types.h8737 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
8738 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf7120_enga_types.h10210 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
10211 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf9230_engb_types.h15067 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
15068 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf54h20_types.h15459 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
15460 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…
Dnrf9230_enga_types.h14541 …#define ETM_TRCVDCTLR_EVENT4_Pos (4UL) /*!< Position of EVENT4 field. … macro
14542 …#define ETM_TRCVDCTLR_EVENT4_Msk (0x1UL << ETM_TRCVDCTLR_EVENT4_Pos) /*!< Bit mask of EVENT4 field…