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Searched refs:ETM_TRCVDCTLR_EVENT2_Pos (Results 1 – 9 of 9) sorted by relevance

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Dnrf54l09_enga_types.h8551 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
8552 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf54l15_types.h8254 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
8255 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf54l05_types.h8254 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
8255 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf54l10_types.h8254 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
8255 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf54l20_enga_types.h8721 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
8722 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf7120_enga_types.h10194 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
10195 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf9230_engb_types.h15051 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
15052 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf54h20_types.h15443 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
15444 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…
Dnrf9230_enga_types.h14525 …#define ETM_TRCVDCTLR_EVENT2_Pos (2UL) /*!< Position of EVENT2 field. … macro
14526 …#define ETM_TRCVDCTLR_EVENT2_Msk (0x1UL << ETM_TRCVDCTLR_EVENT2_Pos) /*!< Bit mask of EVENT2 field…