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Searched refs:ETM_TRCEVENTCTL1R_INSTEN1_Pos (Results 1 – 9 of 9) sorted by relevance

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Dnrf54l09_enga_types.h7459 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
7460 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf54l15_types.h7162 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
7163 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf54l05_types.h7162 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
7163 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf54l10_types.h7162 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
7163 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf54l20_enga_types.h7629 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
7630 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf7120_enga_types.h9102 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
9103 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf9230_engb_types.h13959 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
13960 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf54h20_types.h14351 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
14352 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…
Dnrf9230_enga_types.h13433 …#define ETM_TRCEVENTCTL1R_INSTEN1_Pos (1UL) /*!< Position of INSTEN1 field. … macro
13434 …#define ETM_TRCEVENTCTL1R_INSTEN1_Msk (0x1UL << ETM_TRCEVENTCTL1R_INSTEN1_Pos) /*!< Bit mask of IN…