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Searched refs:CRACEN_SEEDLOCK_ENABLE_Pos (Results 1 – 7 of 7) sorted by relevance

/hal_nordic-latest/nrfx/hal/
Dnrf_cracen.h248 : CRACEN_SEEDLOCK_ENABLE_Disabled) << CRACEN_SEEDLOCK_ENABLE_Pos; in nrf_cracen_seedram_lock_enable_set()
262 << CRACEN_SEEDLOCK_ENABLE_Pos); in nrf_cracen_seedram_lock_check()
/hal_nordic-latest/nrfx/mdk/
Dnrf54l09_enga_types.h3557 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
3558 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…
Dnrf54l15_types.h3382 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
3383 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…
Dnrf54l05_types.h3382 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
3383 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…
Dnrf54l10_types.h3382 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
3383 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…
Dnrf54l20_enga_types.h3727 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
3728 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…
Dnrf7120_enga_types.h5200 …#define CRACEN_SEEDLOCK_ENABLE_Pos (0UL) /*!< Position of ENABLE field. … macro
5201 …#define CRACEN_SEEDLOCK_ENABLE_Msk (0x1UL << CRACEN_SEEDLOCK_ENABLE_Pos) /*!< Bit mask of ENABLE f…