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Searched refs:TEMP_B0_B0_Msk (Results 1 – 10 of 10) sorted by relevance

/hal_nordic-3.6.0/nrfx/mdk/
Dnrf52805_bitfields.h7768 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52810_bitfields.h8776 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52811_bitfields.h9481 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52820_bitfields.h8119 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf5340_network_bitfields.h9803 #define TEMP_B0_B0_Msk (0xFFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52_bitfields.h12187 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52833_bitfields.h13033 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf52840_bitfields.h13396 #define TEMP_B0_B0_Msk (0x3FFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. */ macro
Dnrf54l15_enga_types.h34968 …#define TEMP_B0_B0_Msk (0xFFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. … macro
Dnrf54h20_enga_types.h74028 …#define TEMP_B0_B0_Msk (0xFFFUL << TEMP_B0_B0_Pos) /*!< Bit mask of B0 field. … macro