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Searched refs:PPI_CHENCLR_CH27_Disabled (Results 1 – 8 of 8) sorted by relevance

/hal_nordic-3.6.0/nrfx/mdk/
Dnrf51_bitfields.h3669 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Channel disabled. */ macro
Dnrf52805_bitfields.h4250 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52810_bitfields.h4873 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52811_bitfields.h4873 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52820_bitfields.h4608 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52_bitfields.h8316 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52833_bitfields.h8276 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52840_bitfields.h8400 #define PPI_CHENCLR_CH27_Disabled (0UL) /*!< Read: channel disabled */ macro