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Searched refs:PPI_CHENCLR_CH1_Disabled (Results 1 – 8 of 8) sorted by relevance

/hal_nordic-3.6.0/nrfx/mdk/
Dnrf51_bitfields.h3823 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Channel disabled. */ macro
Dnrf52805_bitfields.h4362 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52810_bitfields.h5055 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52811_bitfields.h5055 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52820_bitfields.h4790 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52_bitfields.h8498 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52833_bitfields.h8458 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro
Dnrf52840_bitfields.h8582 #define PPI_CHENCLR_CH1_Disabled (0UL) /*!< Read: channel disabled */ macro