Searched refs:TEMP_B5_B5_Pos (Results 1 – 8 of 8) sorted by relevance
7802 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro7803 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
9515 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro9516 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
8810 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro8811 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
9837 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro9838 #define TEMP_B5_B5_Msk (0xFFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
8153 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro8154 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
12221 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro12222 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
13067 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro13068 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
13430 #define TEMP_B5_B5_Pos (0UL) /*!< Position of B5 field. */ macro13431 #define TEMP_B5_B5_Msk (0x3FFFUL << TEMP_B5_B5_Pos) /*!< Bit mask of B5 field. */
